Panel Level Packaging: One Size Fits All?

Panel Level Packaging: One Size Fits All?


February 16, 2017    Paul Werbaneth

There is an active and robust supply chain currently supporting these wafer sizes in the semiconductor manufacturing industry: 3”; 4”; 6”; 200mm; 300mm; and 330mm.

Using 3D Integration to Get the Heat Out

Using 3D Integration to Get the Heat Out


February 15, 2017    Francoise von Trapp

Thermal management is one of the last vestiges of 3D integration challenges. As such, the European 3D Summit (Jan 23-25, 2017) devoted its entire R&D

Highlights from the 2017 European 3D Summit

Highlights from the 2017 European 3D Summit


February 14, 2017    Francoise von Trapp

The 5th Annual European 3D Summit drew 220 attendees from 18 countries who gathered to understand the latest advanced packaging, 2.5D and 3D IC technologies

Process Control Gains Importance in Advanced Packaging Applications

Process Control Gains Importance in Advanced Packaging Applications


February 13, 2017    Tim Anderson

2016 will be remembered as the year fan-out wafer level packaging (FOWLP) went mainstream, thanks to TSMC’s strategic move in the advanced packaging arena and

The Edge of 3D: 3D SoC VLSI and Si Photonics

The Edge of 3D: 3D SoC VLSI and Si Photonics


February 8, 2017    Francoise von Trapp

Last week, I posted an executive summary of this year’s European 3D Summit, touching on the highlights and general takeaways based on the closing remarks

Welcome to a New Era of Predictive Yield Process Control for Advanced Packaging

Welcome to a New Era of Predictive Yield Process Control for Advanced Packaging


February 2, 2017    Francoise von Trapp

In April 2016, Fogale Nanotech Group acquired the assets of Altatech Semiconductor from Soitec in order to combine the metrology offerings of Fogale Nanotech Semicon

Silicon Patents: Repeating the Past

Silicon Patents: Repeating the Past


February 1, 2017    Bill Martin

“Those who cannot remember the past are condemned to repeat it” ~ George Santayana Over the past forty years, the presence of legally protected Intellectual Property (IP) has dramatically grown

2017 European 3D Summit: Making Advanced Packaging Great Again

2017 European 3D Summit: Making Advanced Packaging Great Again


January 30, 2017    Francoise von Trapp

Every year, I attend most of the events that are focused on 3D integration and related approaches to semiconductor advanced packaging. One thing that I’ve

FOGALE Nanotech Group Subsidiary UnitySC Opens New Global Headquarters in Grenoble, France

FOGALE Nanotech Group Subsidiary UnitySC Opens New Global Headquarters in Grenoble, France


January 24, 2017    UnitySC

Grenoble, France – UnitySC, a wholly owned subsidiary of FOGALE Nanotech Group and a leader in inspection and metrology solutions for advanced semiconductor packaging, today announced

TechSearch International Analysis Predicts Growth for Fan-in and FO-WLP


January 18, 2017    TechSearch International, Inc.

TechSearch International Analysis Predicts Growth for Fan-in and FO-WLP TechSearch International predicts strong market growth for fan-in wafer level packages (WLPs) and fan-out WLP (FO-WLP).

Addressing Advanced Packaging Challenges in 2017 and Beyond

Addressing Advanced Packaging Challenges in 2017 and Beyond


January 17, 2017    Gurvinder Singh

As the two-dimensional (2D) shrinking of planar circuits (on which Gordon Moore based his famous observation) has become more difficult and expensive, the semiconductor industry

Outlook 2017: Advanced Packaging Technology Takes Center Stage

Outlook 2017: Advanced Packaging Technology Takes Center Stage


January 12, 2017    Thomas Uhrmann

The era of “More than Moore” was alive and well in 2016 as the semiconductor industry witnessed many new developments in advanced packaging. Among these

What the Heterogeneous Integration Technology Roadmap Will Mean for 2017

What the Heterogeneous Integration Technology Roadmap Will Mean for 2017


January 11, 2017    Robert Kavanagh

While it seems that the semiconductor industry has suddenly embraced heterogeneous integration as the next revolutionary innovation to further the quest for higher performance and

Top Ten Reasons to Attend the 2017 European 3D Summit

Top Ten Reasons to Attend the 2017 European 3D Summit


January 9, 2017    Francoise von Trapp

It’s that time of year again! For the 5th consecutive year, SEMI Europe is hosting the European 3D Summit (formerly known as the 3D TSV

13th 3D ASIP Conference Demonstrates Manufacturer’s Commitment

13th 3D ASIP Conference Demonstrates Manufacturer’s Commitment


January 6, 2017    Herb Reiter

The 3D Architectures for Semiconductor Integration and Packaging (3D ASIP) conference is one of the biggest (if not THE biggest) event focused exclusively on the

imec Collaborates with Antwerp and Flanders to Establish Smart City Living Lab

imec Collaborates with Antwerp and Flanders to Establish Smart City Living Lab


January 6, 2017    imec

How can the Internet of Things change the future of the average citizen? To answer this question, imec joins forces with the City of Antwerp