The Next Frontier—AI for Semiconductor Test
Jun 16, 2025 · By PDF Solutions · Test and Inspection
Design View all
Multi Physics Analysis of 3D Integrated Circuits
3D integration is becoming a valuable alternative to the ongoing, yet challenging, transistor scaling known as Moore’s Law. This is especially true for semiconductor products that are becoming limited by single die designs (e.g., in terms of form factor, size, and technology node). Homogenous 2.5D-IC approaches help bring about the...
Taking 3D IC Heterogeneous Integration Mainstream
By Tony Mastroianni and Todd Burkholder, Siemens DIS Over the last several years, chiplet-based heterogeneous package integration has emerged as a promising alternative to traditional monolithic package solutions; the so-called homogenous SoC design. 3D IC heterogeneous integration is a system approach, wherein what typically would be implemented as an SoC...
Devices View all
How AiP Technology Helps Enable 5G and More
For 5G smartphones and other millimeter-wave (mmWave) applications, antenna integration, either through antenna-in-package (AiP) or antenna-on-package (AoP) technologies, simplifies the challenges associated with designing products that operate at these high frequencies. A variety of AiP/AoP design methodologies provide the required form, fit, and function for these applications and can include...
System-on-Chip Disintegration is Underway
We have known for some time that with scaling coming to an end the industry would need to find another way to continue moving forward. One of the options is known as SoC disintegration, which is when a system-on-chip (SoC) is disintegrated into its functional parts and then connect these...
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Foundry 2.0 – the New Path Forward for Moore’s Law
NHanced Semiconductor president Robert Patti’s presentation at the recent SEMIEXPO Heartland in Indianapolis, IN described the critical role of advanced...
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Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications
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Artificial intelligence (AI) is driving the need for faster processing speeds to keep up with the large language models. As...
The Role of Chiplets in Redefining Semiconductor Design
Chiplets are transforming the semiconductor landscape. Rather than relying on larger, all-in-one designs, chiplets offer a modular approach to chip...
Multi-Tier Die Stacking Enables Efficient Manufacturing
Achieve higher integration density with collective die-to-wafer bonding Advanced packaging is currently facing a critical challenge to increase manufacturing efficiency...
Diving Deep into TSV Cleaning and Electroplating Processes For Heterogeneous Integration
By Jim Straus and Sally-Ann Henry, ACM Research While heterogeneous integration of multiple components and 2.5D/3D packaging techniques pair perfectly...
Expanding the Chiplet Market: Processing Any Wafer from Any Foundry
In response to the rising costs of advanced nodes and the slowdown of Moore’s Law, major vendors – AMD, Intel,...
Chiplet Test: Piecing Together the Next Generation of Chips (Part 2)
Testing the limits: standardization and optimization of chiplet test protocols Chiplets often come from different sources, making electrical testing challenging....
Chiplet Interconnect Technology: Piecing Together the Next Generation of Chips
Bridging the gap: innovations in chiplet interconnect technology Chiplet interconnects begin with small chips – or chiplets – with a...
Novel Surface Metrology Techniques for Hybrid Bonding
Executive Summary: Innovative, High Throughput Surface Metrology Hybrid bonding is enabling the next generation of advanced packaging in the semiconductor...
Thermal Simulation of a Packaged GaN MMIC
StratEdge has been designing and manufacturing packages for high-power, high-frequency compound semiconductors since the early 1990s, with much attention focused...
Five Workflows for Tackling Heterogeneous Integration of Chiplets for 2.5D/3D
Keeping pace with Moore’s law continues to be challenging and is driving the adoption of innovative packaging technologies that support...
Solving the AI Puzzle
An AI package is like a puzzle made up of individual pieces of different sizes and shapes, each one essential...
Balancing Precision and Throughput in 3D Structures with Advanced Packaging and Motion Control
The relentless drive in the semiconductor industry to consistently deliver improved performance and power efficiency has traditionally led to increasingly...
Rapid Development and Optimization of Thermal Management Solutions for Advanced Semiconductor Packaging
As the power density increases for semiconductor devices, thermal management is becoming an ever more critical challenge for reliability and...
