3D In Context

About Herb Reiter

After more than 20 years in technical and business roles at semiconductor and EDA companies, Herb Reiter founded eda2asic Consulting, Inc. in 2002 to focus on increasing the cooperation between EDA suppliers and ASIC vendors. In this role Herb introduced innovative IC design tools to the major semiconductor vendors worldwide. In 2008 he expanded his scope into Multi-die ICs. As chair of the GSA’s 3D-IC Working Group (2008-2011) and as SEMATECH business development consultant (2012 + ‘13), he broadened his horizon to include interposers and 3D-ICs technology, semiconductor materials as well as manufacturing, metrology and test equipment. In 2014 + '15 Herb consulted with Si2, to encourage development and standardization of data exchange formats for Interposer and 3D-IC design flows. Since early 2016 he is consulting with the newly formed Electronic System Design Alliance (formerly EDAC), to accelerate market acceptance of Multi-die ICs, the essential building blocks for the emerging System Scaling methodology.
Herb attended 40+ Continuing Education courses at Stanford University, earned an MBA at San Jose State University and Master Degrees in Business and Electrical Engineering at the University and the Technical College in Linz/Austria, respectively. He can be reached at herb@eda2asic.com

Here are my most recent posts

Tech Session Highlights from ECTC 2017

Tech Session Highlights from ECTC 2017

Françoise promised in her recent blog that my ECTC blog would follow shortly. Finally, after attending DAC in Austin as well as the iMAPS’ SiP Conference in California’s Wine Country and shortly before attending Semicon West in San Francisco, I found some time to report what I saw and learned at ECTC 2017 in Orlando. ECTC offered six parallel tracks for the about 1500 attendees. I could of co... »

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

Editor’s note: For several years now, Mentor Graphics has evangelized about the critical need for assembly design kits to enable commercialization of high-density advanced packaging technologies, such as fine line and space fan-out, 2.5D and 3D IC packages. With this week’s introduction of a unique, end-to-end, high-density advanced packaging (HDAP) design flow, combined with the launch of an... »

Will IoT be the Next Killer App for Semiconductors?

Will IoT be the Next Killer App for Semiconductors?

At the end of April, I attended the Internet of Things (IoT) Developers Conference at the Santa Clara Convention Center. Because our semiconductor industry is expecting that IoT applications will significantly contribute to revenue growth, I wanted to get the latest about: If, how, when, why and for which applications IoT designs will be introduced and ramped into high-volume production. General i... »

Part 2: IMAPS DPC 2017 Covers Range of High-tech Topics, including EDA

Part 2: IMAPS DPC 2017 Covers Range of High-tech Topics, including EDA

The keynotes outlined in Part 1 of IMAPS DPC 2017 Covers Range of High-tech Topics, including EDA were obviously very important, but a relatively small part of the entire conference. After the two keynotes on Tuesday morning, I listened to YOLE’s presentation, delivered by Santosh Kumar, and learned that the three big memory vendors (Samsung, Micron, and Hynix) jointly hold over 200 TSV patents ... »

IMAPS DPC 2017 Covers Range of High-tech Topics, Including EDA

IMAPS DPC 2017 Covers Range of High-tech Topics, Including EDA

The WeKoPa Resort near Phoenix was the venue for the latest IC packaging focused conference, IMAPS DPC 2017, which took place in early March. The exhibition floor and all the sessions I joined were well attended and covered a broad range of topics, including design tools and methodology demonstrations from both Cadence and Mentor Graphics (as of Friday, 3/31, officially re-branded “Mentor, a Sie... »

Highlights of the 23rd TSMC Symposium

Highlights of the 23rd TSMC Symposium

On March 15, 2017, TSMC held its 23rd Symposium, based on popular request, at the Santa Clara Convention Center. I had the opportunity to attend the entire symposium and want to share some of my impressions and facts learned with you. TSMC, by far the biggest pure-play foundry, has pioneered the transition from integrated device manufacturers (IDMs) to the fabless and foundry business model and ha... »

13th 3D ASIP Conference Demonstrates Manufacturer’s Commitment

13th 3D ASIP Conference Demonstrates Manufacturer’s Commitment

The 3D Architectures for Semiconductor Integration and Packaging (3D ASIP) conference is one of the biggest (if not THE biggest) event focused exclusively on the 3D IC family of technologies. The December 2016 event was held even closer to San Francisco airport than in previous years. From the lobby of the SFO Marriott Hotel, we could see planes taking off and landing.  Every smooth touch-down an... »

IEDM 2016 Demonstrates Device Physics For The Semiconductor Industry

IEDM 2016 Demonstrates Device Physics For The Semiconductor Industry

In the past few months I have been reading a lot of depressing news about our semiconductor industry’s declining growth rates, shrinking profit margins, many consolidations, as well as many articles about why, when and how following Moore’s Law will be only justified for extremely high-volume designs. Sounds kind of depressing and worrisome for semiconductors, however, last week’s Internatio... »

Pasadena offers Roses and Technology

Pasadena offers Roses and Technology

California’s Pasadena is well known for the New Year Rose Parade and the Rose Bowl. There is no doubt: It takes commitment and organizational talent to make these events successful for 100+ years, and encourage every contributor to prepare and execute successful events every year. Last week’s International Microelectronics Assembly and Packaging Solutions Conference (iMAPS) in Pasadena’s Con... »

Image Courtesy of TSMC Ltd.

TSMC’s OIP Symposium 2016

After a fairly long vacation it’s very hard to get back to work. That’s why I was really glad that this year’s OIP Symposium helped me – right after touring Europe for 3 weeks – to finding my groove again. Allow me to share some of my observations at and thoughts about the Symposium, from my “More-than-Moore EcoSystem builder” perspective. The collaborative innovation programs TSMC ... »

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