Working from the mantra “None of us knows as much as all of us,” SEMI invited manufacturers of electronic components...
More than 20 years ago, the cooperation between fabless IC vendors and wafer foundries started to dominate over the integrated...
Recognizing the need fand value of semiconductor industry organizations, in 1994, Jodi Shelton and CEOs of fabless IC companies founded ...
Technology innovations don’t reach customers right away. Since 1980 I have observed how our industry has improved key parameters like...
Because memory represents typically about half the silicon content of a system, and multi-die packages typically combine many memory devices...
Earlier this summer, 175 system-in-package (SiP) experts from all over the world met at the Marriott Hotel in Monterey’s Old...
SEMICON West and the Electronic System (ES) Design West were, for the first time, co-located at the Moscone Center in...
In addition to Francoise’s post about technology megatrends here, below is part one of my perspective, mostly about the SEMICON West...
Would you buy your next hotdog in parts, from un-coordinated suppliers? For example: Get the bun from a baker, the...
An essential part of successfully introducing a new technology is to educate engineers and managers on its benefits and tradeoffs....
Key advanced packaging technology influencers came out in force to discuss the status of EDA tools for 2.5D/3D IC package...
In 1994 TSMC, a small wafer foundry from Taiwan held its first Technology Symposium. Since 1999 I have had the...
The Microelectronics Packaging & Test Engineering Council (MEPTEC) held its monthly meeting at SEMI in Milpitas on April 10. Two...
Santa Clara’s Convention Center was home to DesignCon 2019 from January 29-31, 2019. This conference is well known for showing...
Just in case you didn’t have a chance yet to read part 1 of the ISS 2019 blog, covering day...
SEMI held its annual Industry Strategy Symposium (ISS 2019) at the Ritz Carlton in Halfmoon Bay, CA January 6-9, 2019....
The Microelectronics Packaging and Test Engineering Council (MEPTEC) held its annual heterogeneous integration symposium at SEMI’s headquarters in Milpitas, CA...
Wafer and panel-level packaging (WLP/PLP) offers technical and business advantages, compared to traditional IC packages. These cost-effective packaging solutions attracted...
At this year’s International Wafer-level Packaging Conference, almost 1000 semiconductor experts from all parts of the supply chain gathered at...
As I prepared to attend TSMC’s OIP 2018 Forum on October 3, 2018 two emails from TSMC caught my attention....