The semiconductor industry is not only very capital-intensive, but investors experience very long payback times. Both limit the availability of private funding. If you are jealously looking at China and the billions of dollars they invest in semiconductors, I recommend you make a closer study of US investments in heterogeneous integration, and specifically DARPA.
DARPA Heterogeneous Integration Initiatives Explained
This question of US investments in heterogeneous integration (HI) was answered in great detail by Jeff Demmin, Senior Lead Scientist, Booz Allen Hamilton during a recent IMAPS/MEPTEC Luncheon, held at SEMI on September 11, 2019. His talk, aptly titled “Government Investment in Heterogeneous integration” outlined DARPA’s more than 20-year history “Government Investment in Heterogeneous Integration”. He described their broad support for breakthrough technologies and capabilities that contribute to U.S. national security and innovations.
Demmin confirmed that HI is extending Moore’s Law by achieving higher density, more functionality and higher performance per Watt by means beyond feature size shrinking. In contrast to monolithic 2D and 3D integration, HI also offers modularity, which enables serving lower volume opportunities, such as military applications, faster and much more economically.
Figure 1 shows how different the characteristics of common semiconductor materials are and explains why it’s so important to use the most appropriate material for a specific monolithic IC or (sub)system design. This table also shows DARPA programs utilizing these materials.
DARPA’s Alphabet Soup
DARPA’s HI efforts began years ago with the Compound Semiconductor Materials on Silicon (COSMOS) program, which is now part of the Diverse Accessible Heterogeneous Integration (DAHI) thrust. DAHI addresses technical challenges related to developing HI processes, establishing foundries, achieving high-yield manufacturing flows as well as encouraging innovation in architectures and circuit design.
Demmin also talked about DARPA’s relatively new Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) program. CHIPS is focused on integrating digital, analog and mixed-signal functional blocks (chiplets), encourages the development of such IP blocks and the definition of interface standards to combine them on a substrate, e.g. an interposer. In support of these efforts, Intel is providing a royalty-free license for their Advanced Interface Bus (AIB) technology to CHIPS program participants.
Another DARPA project explained by Demmin is the ongoing Electronic Resurge Initiative (ERI). Announced during the summer of 2017, ERI wants to ensure far-reaching improvements in electronic performance – well beyond the limits of traditional scaling – e.g. by using photonics and other performance-enhancing and power-saving technologies.
In response to the current trust and security issues in our industry, DARPA is planning a program called Microelectronics Innovation for National Security and Economic Competitiveness (MINSEC).
Demmin also mentioned DARPA plans for a State-of-the-art Heterogeneous Integrated Packaging (SHIP) program. Figure 2 shows the importance of thinking about the Ecosystem and its impact on innovation. Inside the dashed square are all the topics DARPA’s SHIP program will focus on. The rest of this slide shows major SHIP influencers/dependencies that need to also be considered for its success.
The next MEPTEC Luncheon will be on October 16, 11.30 to 1 pm, also at SEMI in Milpitas. Julia Goldstein, Owner of JLFG Communications, will talk about: Greening Semiconductor Manufacturing – Stories from Contract Manufacturers and Suppliers. Julia recently published a book on the topic. Read the 3D InCites review of it here. Learn more about the MEPTEC luncheon series and to register here.
Two more important topics:
From September 23 to 25 SEMI’s Strategic Materials Conference at the DoubleTree near San Jose airport will tell you all about the latest innovations in IC materials – for die and package.
On October 3 and 4, SEMI in Milpitas will host the Electronic Design Process Symposium, focused on how AI and ML influence IC design and manufacturing. My session on Oct 3, pm, will give a 2.5/3D-IC update and talk about materials characterization, wafer-probe advances as well as reliability challenges and solution in IC design and manufacturing.
Thanks for reading….Herb