Materials

Advanced Packaging and 3D come to MRS Spring Meeting

Advanced Packaging and 3D come to MRS Spring Meeting

For the first time ever, the Materials Research Society (MRS) brought its annual Spring meeting to Phoenix. I have never attended this event, as it is deeply academic, and has not been on my radar for 3D or advanced packaging technologies. However, after finding out from fellow SemiSisters, Rozalia Beica, Yole Developpement, and Nancy Stoffel, GE Global Reseach, that there was an advanced packagin... »

Are Design Tools and Thermal Solutions the Missing Links to 2.5D and 3D IC Production?

Are Design Tools and Thermal Solutions the Missing Links to 2.5D and 3D IC Production?

On one side of the fence, we have semiconductor device manufacturers (fabs, foundries, and OSATS) claiming to be ready to ramp 2.5D and 3D IC devices to production, saying that remaining issues can be engineered out. On the other side, we have system integrators who, while they believe 2.5D and 3D ICs are the answer to their performance and power prayers, aren’t ready to dive in head first becau... »

A Solder Bump Expert’s Take on the Expanding World of Advanced Packaging

A Solder Bump Expert’s Take on the Expanding World of Advanced Packaging

An interesting take-away from the keynote talk delivered by Brandon Prior, Prismark Partners, at this year’s IMAPS International Device Packaging Conference, held March 11-13 in Fountain Hills, AZ, was the observation that just because new advanced packaging types are being introduced to the market, it doesn’t mean that older ones are dropping off or becoming obsolete. As a result, wha... »

Latest Developments in Cleans for TSVs and Cu Bumps

Latest Developments in Cleans for TSVs and Cu Bumps

At IMAPS DPC 2014, which took place March 11-13, 2014, in Fountain Hills, AZ, there were several presentations focused on new developments in cleans for TSVs and Cu bumps for 2.5D and 3D IC processes. Cleans has become increasingly important as bump pitches are reduced and TSVs have higher aspect ratios. It’s not just about being clean enough, but also about surface preparation for the next proc... »

Progress Reports for 3D IC Thermal Management and Test

Progress Reports for 3D IC Thermal Management and Test

In Jan Vardaman’s recent readiness report card issued at 3D ASIP in December, 3D IC thermal management issues scored and “F” for lack of a solution o the hot-spot problem when stacking memory on logic. And while she gave 3D IC test a “B” for probe card development, it got an incomplete for reliability data. At the end of her presentation, she invited anyone with new solutions to “see ... »

3D Memory Using Conductive Lines for Vertical Interconnects

3D Memory Using Conductive Lines for Vertical Interconnects

The push for size reduction is reaching the segment of vertical interconnects. Current technology has a lower limit of approximately 0.150mm (0.006”) with pump and materials being the limiting factor. GPD Global through cooperation with MicroCoat Technologies have developed a process to dispense vertical interconnects at line widths from 0.075 to 0.100mm. A combination of fluid formulation and p... »

Image Courtesy of TSMC Ltd.

What Node Names Really Mean; The TB/DB Saga continues; HMC update

Did you know that when foundries talk about 14nm and 16nm node chips, these devices are in reality no denser than their 20nm predecessors? Or that a particular node name does not reflect the size of any particular chip feature, as it once did? Or that since 2007, the doubling of transistors on a chip has actually been more like 1.6x the number of the previous generation? According to a recent feat... »

Courtesy of Governor Cuomo's press office

Nano Utica gets $1.5B Infusion; Probably Good Die Revisited; Developments in Monolithic 3D

Word on the street is, New York will soon be known as Nano York, with all the money the state is pouring into nanotechnology research and development. The most recent announcement by Governor Cuomo is a $1.5 Billion Public-Private investment intended to turn the Mohawk Valley (Utica) into the next major hub for nanotechnology research. A consortium of global technology companies headquartered at t... »

courtesy of NORDSON Asymtek

Is it Time for Fluxless Processes for 3D Packaging?

A 3D InCites reader recently inquired whether cost drivers and fine-pitch requirements in 3D applications are moving manufacturers away from flux towards fluxless processes in the bumping steps for both bump formation and assembly.To answer this question, 3D InCites turned to the materials and equipment experts, speaking with Jeff Calvert, Global R&D Director, Advanced Packaging Technologies a... »

Dynaloy: A Formula for Cleans

Dynaloy: A Formula for Cleans

It’s hard to believe that inside such a non-descript building set back down a picturesque country lane in (almost) rural Indiana, really cool things are happening. This is the home of Dynaloy, LLC, a subsidiary of Eastman Chemical Company, where innovative chemical formulations are being developed to remove the most stubborn of photoresists and polymer residues left behind during semiconductor m... »

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