Design

Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018
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Wally Rhines Discusses the Importance of EDA and Design at IWLPC 2018

At this year’s International Wafer-level Packaging Conference, almost 1000 semiconductor experts from all parts of the supply chain gathered at the DoubleTree Hotel in San Jose from October 23 to 25. Among them were also several electronic design automation (EDA) experts who discussed how to streamline die-package-board co-design. They explained how EDA tools enable higher performance per Watt a... »

An Update on the Fan-out Panel-Level Packaging Consortium
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An Update on the Fan-out Panel-Level Packaging Consortium

One topic that has been under hot debate in the semiconductor advanced packaging sector for the past few years is fan-out panel-level packaging (FOPLP).  In theory, the concept of taking fan-out from a 300-mm reconstituted wafer to a large panel format as a way to lower costs seems simple, and even the logical step. It’s not. Skeptics, many burned by the same low-cost advantage argument for inv... »

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium
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EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

When planning the 24th EDPS, the organizing committee, chaired by Shishpal Rawat, former Intel executive, took a number of bold steps EDPS was traditionally held in the spring. We moved EDPS to the fall because that’s a time when more new IC projects are being planned. After many years of holding it in Monterey, we moved EDPS to Milpitas to make it more easily accessible for Silicon Valley folks... »

Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP
Keith Felton - Mentor BSD

Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP

  For several years now, Herb Reiter, eda2asic, and John Ferguson, Mentor Graphics, have been evangelizing about the necessity of assembly design kits (ADK), similar to the process design kits (PDKs) for chip designers, to help drive ecosystem capabilities for what is collectively now being called high density advanced packaging (HDAP), comprising 2.5D IC, 3D IC and high density fan-out wafer... »

Executive Viewpoint: Inside a Multi-Project Wafer Program for 3D Integration
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Executive Viewpoint: Inside a Multi-Project Wafer Program for 3D Integration

Multi-project wafer (MPW) programs have long been considered an economical way to integrate different IC designs from various teams to produce IC design prototypes and low volumes. Because IC fabrication costs are extremely high, it makes sense to share mask and wafer resources in this way. MPWs were historically used for 2D designs, but in 2009, Tezzaron Semiconductor launched an MPW for DARPA to... »

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