Latest Posts
Novel Multi-die Integration Concept Offers Big Benefits
The monthly MEPTEC Luncheons at SEMI in Milpitas focus on microelectronics packaging and test topics. Javier DeLaCruz, Xperi’s VP of...
IFTLE 431: Samsung Qualifies EDA Tools for Multi-die Integration
Samsung reports that they have seen increasing interest in multi-die integration (what they call MDI) for markets such as artificial...
Book Review: Advances in Embedded and Fan-out Wafer Level Packaging Technology
When asked by Beth Keser and Steffen Krönert to review their new book, Advances in Embedded and Fan-out Wafer Level...
Thank 2.5D Interposer Technologies for the Success of 3D ICs
Would it be flippant to say that the most pivotal event that impacted the commercialization of 3D integration technologies, may...HPC, AI and Datacenters: the 2.5D & 3D Stacking Technologies Playground
“2.5D and 3D stacking technologies are the only solution that meet the required performance of applications like AI[1] and datacenter...
Bridging the Interconnect Pitch Gap Calls for 3D Technologies
Last week at IWLPC, keynote speaker, Doug Yu, TSMC, kicked off the event with a similar storyline used by ASE’s...
What Should Replace “2.5D” in the Heterogeneous Integration Nomenclature?
The people have spoken! The results of last week’s poll are in, and it looks like the majority of those...
EDPS 2017: NOT the usual Electronic DESIGN Process Symposium
When planning the 24th EDPS, the organizing committee, chaired by Shishpal Rawat, former Intel executive, took a number of bold...
Artificial Intelligence: A New Era of the Advanced Packaging Industry
Artificial Intelligence (AI) is driving the development of 3D TSV and heterogeneous integration technologies. With its new 3D TSV &...
New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging
Editor’s note: For several years now, Mentor Graphics has evangelized about the critical need for assembly design kits to enable...
More-than-Moore 2.5D and 3D SiP Integration
A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available....
3D TSVs are essential for Heterogeneous Integration, HPC and High-end Memory
This year again, both market segments, high end, and low end, are the main targets of through silicon via (TSV)...
Start Your 2.5D HBM Design Today
High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect... Opportunities for 2.5D and 3D Cost Reduction
A little over a year ago, I wrote a Knowledge Portal entry about the cost of 3D ICs. Here I...
A Perfect Storm is Brewing for Complex Packaging in 2016
If I had not attended the 2015 3D ASIP conference, my outlook for 2016 would have been less upbeat for...
Rudolph Acquires Inspection Technology of Stella Alliance, LLC
Flanders, New Jersey (September 29, 2015)—Rudolph Technologies, Inc. (NYSE: RTEC) announced today that it has purchased Stella Alliance, LLC, a... Tessera to Acquire Ziptronix, Inc. for $39 Million
SAN JOSE, CA (August 28) — Tessera Technologies, Inc. announced the acquisition of Ziptronix, Inc. for $39 million in cash....
Silicon Photonics and 2.5D Interposer Design
Historically, we all took Moore’s Law for granted. With each new node, we could expect to see faster-performing devices, smaller...
