Resource Library

TOP 25 OSATs Ranking: Survival of the Fittest?

TOP 25 OSATs Ranking: Survival of the Fittest?

Out of the top 25 OSATs, Taiwan-based OSATs contributed more than half of the revenue in 2018 followed by China, US, and Malaysia. The leading giant of the outsourced semiconductor and test service providers (OSATs), ASE Technology Holding Co., Ltd. (formerly ASE Inc.) and subsidiaries, has got even bigger after the official acquisition of SPIL on April 30, 2018. In 2018, ASE Technology Holding Co... »

Advanced Substrates: The Winds of Change

Advanced Substrates: The Winds of Change

Historically, the integrated circuit (IC) substrate and board industry have assumed a passive role, especially when it comes to innovation. However, in the past few years, things have changed. The dedicated landscape welcomed innovative solutions and new players. “Today, we are facing an increasingly competitive ecosystem and players are looking to differentiate from each other’s” asserts Ma... »

Book Review: Handbook of 3D Integration – Volume 4

Book Review: Handbook of 3D Integration – Volume 4

An essential part of successfully introducing a new technology is to educate engineers and managers on its benefits and tradeoffs. That’s why Wiley started publishing the Handbook of 3D Integration Series with Volume 1 and 2 in 2008, followed by Volume 3 in 2014. This blog covers Volume 4, introduced in early May 2019. It focuses on three important 3D challenges: IC design, test, and thermal man... »

Material Value: A Narrative About More Sustainable, Less Wasteful Manufacturing

Material Value: A Narrative About More Sustainable, Less Wasteful Manufacturing

While I’m only four chapters into Material Value written by my colleague and SemiSister, Julia Goldstein, I decided to write the review before I finish reading the book, because Julia will be at ECTC next week in Las Vegas, and I want you all to be able to read the review before so that you can buy her book at the 3D InCites table and talk to her about it. And then we can talk about it in a virt... »

3D Test: No Longer a Bottleneck!

3D Test: No Longer a Bottleneck!

When I joined imec in October 2008 to work on test and design- for- test (DfT) of 3D-stacked integrated circuits (ICs), there were only a few test folks active in that emerging field. Consequently, misconceptions about 3D test were omnipresent. In the November 18, 2008 issue of Semiconductor International, Alexander Braun wrote: “At a symposium yesterday on 3-D integration, leading expert Philip... »

Reliable Process Control Solutions for the Growing Power Device Market

Reliable Process Control Solutions for the Growing Power Device Market

The expected increase of the power device market, with a compound annual growth rate (CAGR) of more than 10% — and more particularly insulated-gate bipolar transistor (IGBT) products for automotive and other applications — is pushing the semiconductor industry to adopt specific process solutions. The maturity of IGBT market, boosted by booming demand for electrified vehicles (EV) and hybrid el... »

The 5G Revolution is Pushing Innovations for RF front-end SiP

The 5G Revolution is Pushing Innovations for RF front-end SiP

Without a doubt, 5G has arrived and various key smartphone OEMs have already announced products that will support 5G cellular and connectivity. It is clear for everyone that 5G will totally redefine how the radio frequency (RF) front-end interacts in-between the network and the modem. The new RF bands (sub-6 GHz and mm-wave, as defined in 3GPP release 15) pose big challenges for the industry. The ... »

CoolCube™: More than a True 3D VLSI Alternative to Scaling

CoolCube™: More than a True 3D VLSI Alternative to Scaling

Almost four years ago, we published an article titled “CoolCube™: A True 3DVLSI Alternative to Scaling” on 3D InCites. It described the concept of stacking layers of transistors sequentially on top of each other and documented the research effort happening at Leti to develop a feasible process integration scheme and a comprehensive product design frame. Now, four years later, we can say that... »

Optimizing Your SoC or ASIC to Design PCBs More Cost Effectively

Optimizing Your SoC or ASIC to Design PCBs More Cost Effectively

Shrinking silicon process nodes and increasing memory demands are a nightmare for PCB design teams working with custom ASICs or SoCs on high-performance systems. Huge devices with challenging bump and package-ball net assignments must be integrated onto the PCB while overall system integrity is maintained and signal-layer count and overall PCB size stay within system and cost constraints. This pap... »

Implementing High-Density Advanced Packaging for OSATs and Foundries

Implementing High-Density Advanced Packaging for OSATs and Foundries

Moore’s law is increasingly difficult to maintain and is driving the growth of innovative, high-density advanced packaging technologies in response to system scaling demands. These innovations are increasingly in the form of fan-out wafer level packaging (FOWLP) or multi-substrate / multi-device packages like interposers and system-in-package (SiP). New challenges come with these disruptive tech... »

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