2.5D

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

When planning the 24th EDPS, the organizing committee, chaired by Shishpal Rawat, former Intel executive, took a number of bold steps EDPS was traditionally held in the spring. We moved EDPS to the fall because that’s a time when more new IC projects are being planned. After many years of holding it in Monterey, we moved EDPS to Milpitas to make it more easily accessible for Silicon Valley folks... »

Artificial Intelligence: A New Era of the Advanced Packaging Industry

Artificial Intelligence: A New Era of the Advanced Packaging Industry

Artificial Intelligence (AI) is driving the development of 3D TSV and heterogeneous integration technologies. With its new 3D TSV & 2.5D business update report, Yole Développement (Yole), part of Yole Group of Companies investigates the advanced packaging industry and takes a closer look at the AI impact on this market. “3D integration is clearly offering today unequaled performances suitin... »

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

Editor’s note: For several years now, Mentor Graphics has evangelized about the critical need for assembly design kits to enable commercialization of high-density advanced packaging technologies, such as fine line and space fan-out, 2.5D and 3D IC packages. With this week’s introduction of a unique, end-to-end, high-density advanced packaging (HDAP) design flow, combined with the launch of an... »

More-than-Moore 2.5D and 3D SiP Integration

More-than-Moore 2.5D and 3D SiP Integration

A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available. The book addresses the current status of More-than-Moore system-in-package (SiP) technologies and explores the technical and business tradeoffs for deploying these options in high volume commercial IC products. We’re pleased to provide an excerpt of the preface: “There is a lot of... »

3D TSVs are essential for Heterogeneous Integration, HPC and High-end Memory

3D TSVs are essential for Heterogeneous Integration, HPC and High-end Memory

This year again, both market segments, high end, and low end, are the main targets of through silicon via (TSV) technology providers. In its latest advanced packaging technology and market analysis entitled 3DIC and 2.5D TSV Interconnect for Advanced Packaging: 2016 Business Update report, Yole Développement (Yole) announces, high volume production started: 3D TSV is a reality, especially in the ... »

Start Your 2.5D HBM Design Today

Start Your 2.5D HBM Design Today

High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. In June 2015, AMD introduced its Fiji processor, the first HBM 2.5D design, which comprises ... »

Opportunities for 2.5D and 3D Cost Reduction

Opportunities for 2.5D and 3D Cost Reduction

A little over a year ago, I wrote a Knowledge Portal entry about the cost of 3D ICs. Here I am again to tackle the issue of 2.5D and 3D cost reduction from a slightly different angle. This entry is based on what SavanSys presented at IMAPS Device Packaging 2016. The previous Knowledge Portal entry spent time discussing cost drivers; a few specific numbers were provided, but overall, the details we... »

A Perfect Storm is Brewing for Complex Packaging in 2016

A Perfect Storm is Brewing for Complex Packaging in 2016

If I had not attended the 2015 3D ASIP conference, my outlook for 2016 would have been less upbeat for complex packaging (2.5/3D). But this conference showed that companies and their development organizations are NOT solely looking towards FinFETS and sub 20nm silicon process nodes to meet their integration, power, speed, weight, etc metrics.   We are in the perfect storm: out of control costs a... »

Rudolph Acquires Inspection Technology  of Stella Alliance, LLC

Rudolph Acquires Inspection Technology of Stella Alliance, LLC

Flanders, New Jersey (September 29, 2015)—Rudolph Technologies, Inc. (NYSE: RTEC) announced today that it has purchased Stella Alliance, LLC, a Massachusetts-based semiconductor inspection technology intellectual property (IP) portfolio company. Stella Alliance’s patented illumination, auto-focus and image acquisition technology significantly enhances the ability to identify certain critical d... »

Tessera to Acquire Ziptronix, Inc. for $39 Million

Tessera to Acquire Ziptronix, Inc. for $39 Million

SAN JOSE, CA (August 28) — Tessera Technologies, Inc. announced the acquisition of Ziptronix, Inc. for $39 million in cash. The acquisition expands on Tessera’s existing advanced packaging capabilities by adding a low-temperature wafer bonding technology platform that will accelerate delivery of 2.5D and 3D IC solutions to semiconductor industry customers. Ziptronix’s patented ZiBond... »

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