2.5D

IFTLE 431: Samsung Qualifies EDA Tools for Multi-die Integration

IFTLE 431: Samsung Qualifies EDA Tools for Multi-die Integration

Samsung reports that they have seen increasing interest in multi-die integration (what they call MDI) for markets such as artificial intelligence (AI) and high-performance computing (HPC). They also report a need for new electronic design automation (EDA) solutions because the traditional design doesn’t fully address the latest power and signal noise challenges. Advanced packaging technologi... »

Book Review: Advances in Embedded and Fan-out Wafer Level Packaging Technology

Book Review: Advances in Embedded and Fan-out Wafer Level Packaging Technology

When asked by Beth Keser and Steffen Krönert to review their new book, Advances in Embedded and Fan-out Wafer Level Packaging Technology, I was a little apprehensive. I reminded them that I was NOT an engineer, so would only be able to review it from the layperson’s perspective. They assured me that was precisely what they were looking for, so I agreed. Written by Experts When the book arrived ... »

HPC, AI and Datacenters: the 2.5D and 3D Stacking Technologies Playground

HPC, AI and Datacenters: the 2.5D and 3D Stacking Technologies Playground

“2.5D and 3D stacking technologies are the only solutions that meet the required performance of applications like artificial intelligence (AI) and datacenter as of today”, confirms Mario Ibrahim, Technology & Market Analyst from Yole Développement (Yole). Stacking technologies are used in a variety of hardware, including 3D stacked memory, graphics processor units (GPUs), field programmab... »

Bridging the Interconnect Pitch Gap Calls for 3D Technologies

Bridging the Interconnect Pitch Gap Calls for 3D Technologies

Last week at IWLPC, keynote speaker, Doug Yu, TSMC, kicked off the event with a similar storyline used by ASE’s Tien Wu during his IMAPS Symposium keynote earlier this month: High-performance applications like artificial intelligence (AI), 5G, autonomous driving, and even high-end smartphones are driving the continuation of Moore’s Law augmented by More than Moore. This need for high-performan... »

What Should Replace “2.5D” in the Heterogeneous Integration Nomenclature?

What Should Replace “2.5D” in the Heterogeneous Integration Nomenclature?

The people have spoken! The results of last week’s poll are in, and it looks like the majority of those who participated think we should keep it simple. When it comes to heterogeneous integration nomenclature for package architectures, it should be 2D or 3D. The Back Story The term “2.5D” has been a topic of debate in the advanced packaging world ever since it was first added to the industry... »

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

EDPS 2017: NOT the usual Electronic DESIGN Process Symposium

When planning the 24th EDPS, the organizing committee, chaired by Shishpal Rawat, former Intel executive, took a number of bold steps EDPS was traditionally held in the spring. We moved EDPS to the fall because that’s a time when more new IC projects are being planned. After many years of holding it in Monterey, we moved EDPS to Milpitas to make it more easily accessible for Silicon Valley folks... »

Artificial Intelligence: A New Era of the Advanced Packaging Industry

Artificial Intelligence: A New Era of the Advanced Packaging Industry

Artificial Intelligence (AI) is driving the development of 3D TSV and heterogeneous integration technologies. With its new 3D TSV & 2.5D business update report, Yole Développement (Yole), part of Yole Group of Companies investigates the advanced packaging industry and takes a closer look at the AI impact on this market. “3D integration is clearly offering today unequaled performances suitin... »

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

Editor’s note: For several years now, Mentor Graphics has evangelized about the critical need for assembly design kits to enable commercialization of high-density advanced packaging technologies, such as fine line and space fan-out, 2.5D and 3D IC packages. With this week’s introduction of a unique, end-to-end, high-density advanced packaging (HDAP) design flow, combined with the launch of an... »

More-than-Moore 2.5D and 3D SiP Integration

More-than-Moore 2.5D and 3D SiP Integration

A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available. The book addresses the current status of More-than-Moore system-in-package (SiP) technologies and explores the technical and business tradeoffs for deploying these options in high volume commercial IC products. We’re pleased to provide an excerpt of the preface: “There is a lot of... »

3D TSVs are essential for Heterogeneous Integration, HPC and High-end Memory

3D TSVs are essential for Heterogeneous Integration, HPC and High-end Memory

This year again, both market segments, high end, and low end, are the main targets of through silicon via (TSV) technology providers. In its latest advanced packaging technology and market analysis entitled 3DIC and 2.5D TSV Interconnect for Advanced Packaging: 2016 Business Update report, Yole Développement (Yole) announces, high volume production started: 3D TSV is a reality, especially in the ... »

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