Technologies Features

Replacing NMP: Are You Ready?

Replacing NMP: Are You Ready?

NMP is an abbreviation for N-methyl-2-pyrrolidone (other synonyms are 1-Methyl-2-pyrrolidone and 1-Methyl-2-pyrrolidinone) (Figure 1). NMP has proven itself as an effective and versatile cleaning agent, removing photoresist residue while leaving the surface in good shape for processing steps downstream. However, its time may be short-lived as companies strive to meet environmental health and safet... »

Perspectives on the Cost of Fan-out Wafer Level Packaging vs. Flip Chip Packaging

Perspectives on the Cost of Fan-out Wafer Level Packaging vs. Flip Chip Packaging

Recently, I read a paper published in the 2017 IMAPS Device Packaging Conference proceedings, titled “Cost Comparison of Fan-out Wafer Level Packaging and Flip Chip Packaging,” written by Amy Lujan, of Savansys. Lujan did a very good analysis on the cost comparison of fan-out wafer-level packaging (FOWLP)  with chip-first and die face-down and flip chip (FC) packaging, according to a... »

Striking the Right Chord for Chiplet Integration

Striking the Right Chord for Chiplet Integration

The growing digitalization of our society has made our lives connected and, in many aspects, easier. But the digital revolution also implies that the total amount of data processed in the world is doubling every two years or so. Electronic devices such as mobile phones, laptops, satellites, servers or self-driving vehicles must cope with twice as much data, at higher speeds. Traditional signaling ... »

Concept for 3-dimensional stacking of Flash devices. A thin film field effect transistor with a silicon nitride as charge reservoir and a tunnel oxide. A.J. Walker et al., VLSI Symposium, 2003.

The Future of Non-volatile Memory

Part 4 of the series, The Triumph of Quantum Mechanics at the Heart of Solid-State Data Storage, continues with the future of non-volatile memory. The figure above is a concept for 3D stacking of Flash devices. A thin-film field effect transistor with a silicon nitride as charge reservoir and a tunnel oxide. A.J. Walker et al., VLSI Symposium, 2003. The relentless shrinking of NAND Flash from ... »

The Invention of NAND Flash Memory

The Invention of NAND Flash Memory

Part 3 of the series, The Triumph of Quantum Mechanics at the Heart of Solid-State Data Storage, continues with the invention of NAND flash memory. The above image is of the first comprehensive paper reporting the NAND Flash invention where Fowler-Nordheim tunneling is used for program and erase of the memory. [1] After the fundamental studies in the late 1960’s Quantum Mechanical tunneling... »

The Invention of Tunneling-Based Flash Memory

The Invention of Tunneling-Based Flash Memory

Part 2 of the series, The Triumph of Quantum Mechanics at the Heart of Solid-State Data Storage, continues with a history lesson on the invention of tunneling-based flash memory.  In 1956, William Shockley, shared the Nobel Prize in physics with J. Bardeen and W.H. Brattain, all at Bell Laboratories, “for their researches on semiconductors and their discovery of the transistor effect”. T... »

The Fundamentals and Early History of Quantum Mechanical Tunneling

The Fundamentals and Early History of Quantum Mechanical Tunneling

The mid-1920’s were the miracle years for quantum mechanics. The “Old Quantum Theory” originating with Niels Bohr, had reached crisis point by the end of 1924. Wave-particle duality from Einstein and de Broglie called for something new. The great theorists, Heisenberg, Born, Jordan, Schrödinger, and Dirac, published different formulations of a new theory that were quickly shown... »

The Triumph of Quantum Mechanics at the Heart of Solid-State Data Storage

The Triumph of Quantum Mechanics at the Heart of Solid-State Data Storage

If all the data sent worldwide each day on the internet were burned on to CDs and these were then piled one on top of the other, the resulting heap would reach Mars and back again. Much of this data is thankfully not stored on CDs but rather in much more efficient solid-state memories. And at the heart of these is fascinating, some would say weird, fundamental physics that explains a myr... »

 Integrated Solid-state Capacitors Based on Carbon Nanostructure 

 Integrated Solid-state Capacitors Based on Carbon Nanostructure 

The constant demand for miniaturization, added functionality and increased performance of electronic devices systematically drives higher integration by adding more devices on a single chip. In addition, 3-D or 2.5-D packaging, require on-chip or in-package capacitors, not only in traditional integrated circuits but also for integrated components, possibly on interposers, such as decoupling capaci... »

Temporary Bonding and Debonding Technologies for Fan-out Wafer-Level Packaging

Temporary Bonding and Debonding Technologies for Fan-out Wafer-Level Packaging

Fan-out wafer-level packaging (FOWLP) is a cost-effective way to achieve high interconnect density and to manage larger I/O counts within an affordable package. It enables smaller footprints, higher interconnect density, better routing and thinner packages than current technologies. [1] A standard FOWLP wafer comprises known good die (KGD) and a redistribution layer (RDL) or layers embedded in mol... »

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