Wafer Bonding and NanoCleave: The New Lithography Scaling
Mar 12, 2023 · By Thomas Uhrmann · 3D In-Depth, Processes and Technology
Latest Posts - Page 2
The Fundamentals and Early History of Quantum Mechanical Tunneling
The mid-1920’s were the miracle years for quantum mechanics. The “Old Quantum Theory” originating with Niels Bohr, had reached crisis point by the...
The Triumph of Quantum Mechanics at the Heart of Solid-State Data Storage
If all the data sent worldwide each day on the internet were burned on to CDs and these were then piled one... Integrated Solid-state Capacitors Based on Carbon Nanostructure
The constant demand for miniaturization, added functionality and increased performance of electronic devices systematically drives higher integration by adding more... 3D Systems-on-Chip: Clever Circuit Partitioning To Extend Moore’s Law
In recent years, the technology of 3D integration has evolved into an economically interesting road. In particular, the technology is...
The Dual-Gate Thin Film Transistor for 3D Dynamic and Flash Memory
Data is now the world’s most valuable resource. Solid-state storage of data is driving an innovation revolution built upon 50 years...
Lam Research: SABRE 3D
SABRE® 3D is a next-generation electroplating product designed to meet leading-edge production requirements for advanced packaging applications. This product leverages proprietary... Nordson ASYMTEK: Programmable Tilt + Rotate 5-Axis Fluid Dispenser
Nordson ASYMTEK’s programmable Tilt + Rotate 5-Axis Fluid Dispenser dispenses using 5 axes instead of 3. The X and Y... SPTS: Sigma fxP PVD with Multi-Wafer Degas
SPTS’s Sigma® fxP, is a well established PVD system used in advanced packaging applications such as UBM and RDL. It... KLA-Tencor: CIRCL-AP™
CIRCL-AP™ is a cluster tool with multiple modules, covering all-surface inspection, metrology and review at high throughput for efficient advanced...
EV Group: GEMINI®FB XT Automated Production Fusion Bonding System
The GEMINI®FB XT fusion wafer bonding platform features up to a 3X improvement in wafer-to-wafer bond alignment accuracy as well...
Heterointegration Spoor in the 2015 Analog, MEMS and Sensor Startups to Watch, Part 3
In Parts 1 and 2 of this series, I drew your attention to what Peter Clarke, writing in EETimes on...
Executive Viewpoint: Invensas Opens its Toolbox of Interconnect Options
We’ve heard it expressed many times whenever there’s a new interconnect technology vying for adoption: manufacturers will select the best...
SSEC: Wet Etch Process for TSV Reveal
SSEC’s wet TSV reveal process achieves -/+ 0.7% Si thickness uniformity under the appropriate post grinding conditions with fast throughput.... Akrion Systems: Vacuum Prime and Dry
Akrion Systems’ vacuum prime and drying technology enables the use of a wet immersion method to introduce liquid chemicals or... SETNA: Process for Room Temperature 3D IC Assembly
SETNA, in conjunction with Research Triangle Institute (RTI), has developed a binary alloy (Silver-to-Indium) bonding system for 3D IC assembly... SPTS: Blanket Silicon Etch Process for Via Reveal
The blanket silicon etch process performed on the SPTS Rapier XE achieves an etch rate >8.5µm/min, high selectivity (Si:SiO>150:1), and is... SSEC: WaferEtch TSV Revealer
SSEC’s WaferEtch™ TSV Revealer is a single wafer wet processing platform for 3D IC and interposer wet etching applications designed... Lasertec: BGM300
The BGM300 was designed to enable quick and accurate measurement of Through Si Via (TSV) depths, Si wafer thickness, and...
2013 ITRS Roadmap Calls for 3D Power Scaling; Monolithic 3D Gains Traction
At the beginning of April, the Semiconductor Industry Association released the 2013 International Roadmap for Semiconductors (ITRS), which has traditionally...