system-in-package

IMAPS 2017 SiP Conference Takes on Sonoma

IMAPS 2017 SiP Conference Takes on Sonoma

California’s Wine Country attracts visitors from all over the world. They can enjoy the scenic countryside, historic places, golf courses, tennis courts, gambling and of course great wine and excellent food. How well can a highly technical conference compete with all these “distractions”? Please read about the sessions I attended and judge for yourself! The Inaugural Conference and Exhibitio... »

System-in-Package was the Big Story at IMAPS DPC 2016

System-in-Package was the Big Story at IMAPS DPC 2016

“The sum is greater than the whole of its parts.” ~ Aristotle (and Bill Chen) While the technology tracks offered the latest developments in interposer and 3D IC processes, fan-out, wafer-level packaging, flip chip, MEMs, sensors and more, System-in-package (SiP) was the big story of the 2016 MAPS Device Packaging Conference, which was held March 15-17, 2016 in Fountain Hills, AZ. Why? Because... »

Miniaturization Trends Drive Growth in SiP Market

Miniaturization Trends Drive Growth in SiP Market

With the proliferation of mobile electronic products and the ongoing push for greater functionality in a smaller area, miniaturization has become a key word for system-in-package (SiP). SiP provides increased functionality in a subsystem that can be more cost-effectively assembled into a system. Miniaturization and other technology trends driving SiP market growth are covered in TechSearch Interna... »

ALLVIA – A TSV Success Story

Is ALLVIA ahead of the pack? While the rest of us wonder when through silicon via (TSV) will be ready for market adoption, a small Sunnyvale-based company, ALLVIA, has been chugging right along for the past five years, manufacturing TSVs for a variety of applications like advanced vertical interconnect, silicon interposers for system-in-package, and MEMS sensors. For the past 3 years, they’ve ev... »