The challenge of designing smaller, cost-effective systems that require additional processing and performance power led to 3D chip stacking of bare die and a new approach to packaging known as SiP (systems-in-package), also known as multi-chip modules (MCMs). The benefits of MCM/SiP package technology include the ability to achieve greater functionality in a reduced time-to-market window that cannot be accomplished through direct silicon integration or ASIC development. Along with the many benefits of the SiP approach came new design challenges. This paper focuses on a common occurrence in systems companies: how to design SiPs that are optimized for their target PCBs.


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