EDA

DAC 2018: New Opportunities for EDA and the Entire Semiconductor Supply Chain

DAC 2018: New Opportunities for EDA and the Entire Semiconductor Supply Chain

This year’s Design Automation Conference (DAC 2018) was held at Moscone West, San Francisco, CA. On three levels, about 175 exhibitors showed their capabilities and discussed market needs. Our industry’s focus on artificial intelligence (AI) and machine learning (ML) solutions were clearly obvious, and I suspect, attracted more young people and a fairly large number of new exhibitors to DAC th... »

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

Editor’s note: For several years now, Mentor Graphics has evangelized about the critical need for assembly design kits to enable commercialization of high-density advanced packaging technologies, such as fine line and space fan-out, 2.5D and 3D IC packages. With this week’s introduction of a unique, end-to-end, high-density advanced packaging (HDAP) design flow, combined with the launch of an... »

DAC 2016: There is More to Life than IC Design

DAC 2016: There is More to Life than IC Design

In the past, the Design Automation Conference was known to me and many of my colleagues as the annual event that focused on IC design tools, flows, and methodologies. EDA tools vendors and users got together in the previous millennium to discuss what to do next in a rapidly growing market segment. Then things changed… At the beginning of this millennium, the wafer foundries took charge of silic... »

Challenges and Solutions for EDA of 3D Chip Stacks

Challenges and Solutions for EDA of 3D Chip Stacks

It is often claimed that 3D chip stacks offer the potential to meet current and future requirements of digital circuits, such as for performance, functionality, and power consumption. Specifically, both design paradigms “More Moore” and “More than Moore” will benefit from 3D chip stacking (and new technologies and materials). 3D stacking enables notably reduced interconnect... »

DesignCon 2016: Where the Chip meets the Board and Great Ideas Come to Life

DesignCon 2016: Where the Chip meets the Board and Great Ideas Come to Life

DesignCon 2016 at the Santa Clara Convention Center gave football fans among us an opportunity to watch the preparation work for Super Bowl 50. Right across the street from the Convention Center is Levi Stadium, where on Sunday, February 7, this year’s champion will be crowned. Impressive, but let’s not digress and focus on DesignCon. For me, in my role as business developer for innovative pro... »

SEMICON West 2015 Demonstrates the Powerful IC Manufacturing Base

SEMICON West 2015 Demonstrates the Powerful IC Manufacturing Base

A few weeks ago, San Francisco’s Moscone Center hosted the Design Automation Conference (DAC 2015), with many EDA experts and their customers focused on how to design the new wave of 10nm chips, this year and next. Last week the Moscone Center was buzzing again, this time with material suppliers, equipment vendors, and IC manufacturing experts, discussing how to ramp up production and improve yi... »

DAC 2015 Focuses on the Automotive Market

DAC 2015 Focuses on the Automotive Market

By attracting 7011 EDA and IP developers and users, the 52 Design Automation Conference, held in the South Hall of San Francisco’s Moscone Center in the week of June 7, achieved a 14.5% increase in attendees. I was one of them, and started on Sunday evening by listening to Gary Smith’ EDA Forecast presentation. Based on Gary’s and Laurie Blach’s analysis, EDA is likely to grow by 11.2 % ... »

Executive Interview: Si2 Aims to Boost Confidence in Designing 3D ICs

Executive Interview: Si2 Aims to Boost Confidence in Designing 3D ICs

There’s no doubt left in the minds of semiconductor device manufacturers that the processes required to build interposer-based and 3D IC devices are matured and ready for production. However, the jury is still out in the design community because designing 3D ICs still poses a challenge. Si2 has set out to change that and bring confidence to the minds of chip and system-level designers. Steve Sc... »