IMAPS DPC

Celebrating 25 Years of Advanced Packaging Innovation: Part 1

Celebrating 25 Years of Advanced Packaging Innovation: Part 1

After spending three days in the company of the IMAPS community at the 15th annual IMAPS Device Packaging Conference (IMAPS DPC) March5-7,2019, in Fountain Hills, Arizona, I am once again reminded why I chose to focus 3D InCites on the advanced packaging segment of the semiconductor industry. The technology is fascinating and varied, the conversation is inspiring, and the people know how to have a... »

Continental Drifts or Tectonic Shifts? Advanced Packaging 2017

Continental Drifts or Tectonic Shifts? Advanced Packaging 2017

That’s great it starts with an earthquake … R.E.M. Boxing Day 2017 ended with an earthquake in Silicon Valley, at 10:32 pm, a magnitude 3.9 temblor near Alum Rock I thought could have been my neighbor dropping something heavy in the apartment upstairs, except that nobody lifts and drops anything that heavy, for that long, in the building where I live. No reports of damage, but the shaking came... »

3D InCites and IMAPS International Partner to Co-host the 2018 3DInCites Awards at the 2018 IMAPS Device Packaging Conference

3D InCites and IMAPS International Partner to Co-host the 2018 3DInCites Awards at the 2018 IMAPS Device Packaging Conference

Burlingame, California – Dec. 6, 2018 – 3D InCites, the premier content platform for heterogeneous integration technologies, today from the 2017 3D ASIP Conference, announced a collaboration with IMAPS International to co-host the 2018 3D InCites Awards, the semiconductor industry’s most prestigious award program recognizing contributions for the development of heterogeneous integration tech... »

The Advancement of Device Packaging – A Resume on IMAPS DPC 2017

The Advancement of Device Packaging – A Resume on IMAPS DPC 2017

As part of the organizing committee, we believe this year’s IMAPS Device Packaging Conference really fulfilled what the announcement promised – the largest conference dedicated to the full spectrum of 3DIC and packaging, fan-out technologies and MEMS/sensors. We enjoyed 12% attendee growth over 2016, welcoming nearly 600 attendees from 20 countries, in addition to a 12th consecutive so... »

What’s in Store For You at IMAPS DPC 2017

What’s in Store For You at IMAPS DPC 2017

Just under a week away, the agenda for the 2017 IMAPS Device Packaging Conference and co-located Global Business Council is geared to inspire attendees about the growing importance of heterogeneous integration technologies supported by advanced wafer level packaging, 2.5D, and 3D integration. While the quest for smaller silicon nodes continues, it’s well understood that these technologies are fi... »

Advanced Packaging Alphabet Soup Creates Chaos for IMAPS 3D Panel

Advanced Packaging Alphabet Soup Creates Chaos for IMAPS 3D Panel

All hell broke loose at the 3D Panel discussion at the 2014 IMAPS International Device Packaging Conference. Nobody was hurt, and nothing got thrown, mind you, but it’s clear that we’ve got some very different opinions regarding one of my  pet peeves – the ever-expanding and increasingly complex advanced packaging nomenclature. Oh it started out innocently enough. The aim of the panel, titl... »

Dynaloy™ Researchers to Detail One-Step Cleaning Process for TSVs

Dynaloy™ Researchers to Detail One-Step Cleaning Process for TSVs

INDIANAPOLIS, Ind., February 24, 2014 – A team of researchers from Dynaloy and Solid State Equipment Corporation (SSEC) have developed a robust, one-step cleaning process for TSVs for the removal of post etch residue. Kim Pollard, Technology Manager at Dynaloy, will discuss this new cleaning process and chemistry at the Device Packaging Conference for the International Microelectronics Assembly ... »

3D Talk at IMAPS DPC 2013

3D Talk at IMAPS DPC 2013

At this year’s IMAPS International Device Packaging Conference, despite a robust line-up of speakers and presentations focused on 2.5D and 3D integration technologies, I came away feeling slightly empty handed. Concerned that this was just my own perspective after years of 3D IC total immersion, I asked around to take the pulse of the other attendees, many of whom are 3D IC ‘regulars’ like m... »

Food for thought from the test and burn-in guys

Sometimes I like to mix it up a bit. So last night I was the invited guest speaker at the BiTS workshop, an event focused on the latest information about burn-in and test socketing, as well as semiconductor test issues. I was asked to share what I know about 3D packaging, and particularly 3D TSV test issues. I hope I did justice to our collective cause! »