InFO

Pasadena offers Roses and Technology

Pasadena offers Roses and Technology

California’s Pasadena is well known for the New Year Rose Parade and the Rose Bowl. There is no doubt: It takes commitment and organizational talent to make these events successful for 100+ years, and encourage every contributor to prepare and execute successful events every year. Last week’s International Microelectronics Assembly and Packaging Solutions Conference (iMAPS) in Pasadena’s Con... »

Image Courtesy of TSMC Ltd.

TSMC’s OIP Symposium 2016

After a fairly long vacation it’s very hard to get back to work. That’s why I was really glad that this year’s OIP Symposium helped me – right after touring Europe for 3 weeks – to finding my groove again. Allow me to share some of my observations at and thoughts about the Symposium, from my “More-than-Moore EcoSystem builder” perspective. The collaborative innovation programs TSMC ... »

System Plus Consulting confirms: Apple A10 processor uses TSMC’s inFO technology

System Plus Consulting confirms: Apple A10 processor uses TSMC’s inFO technology

System Plus Consulting announces the release in the next few weeks of a complete report on TSMC’s Integrated Fan-Out (inFO) technology used for Apple’s A10® processor packaging. And few results are already available. Indeed System Plus Consulting’s experts propose you to discover a previous of the first conclusions. Featured in the latest Apple iPhone 7®, the Apple A10 processor has high... »

22nd TSMC Symposium Conveys Accomplishments and Looks at the Road Ahead

22nd TSMC Symposium Conveys Accomplishments and Looks at the Road Ahead

Earlier this week I had the opportunity to attend this year’s TSMC Symposium. Just like in many previous years, TSMC had a lot of progress to report and demonstrated that they have a clear vision of the road ahead. As I expressed in previous years’ blogs, I started to get to know TSMC as a formidable competitor when I was marketing ASIC solutions at VLSI Technology. TSMC led the transition fro... »

At 3D ASIP 2015, Variety is the Spice of Life

At 3D ASIP 2015, Variety is the Spice of Life

Staying relevant in the ever-expanding technology landscape that is the semiconductor packaging industry can be a struggle for an event that’s been laser-focused on one emerging segment since its inception. But this past week, 3D Architectures for Semiconductor Integration and Packaging  (3D ASIP 2015) delivered a program that not only addressed the progress of 3D integration, it also expanded... »

Takeaways from the 5th Annual IEEE Global Interposer Technology Workshop

Takeaways from the 5th Annual IEEE Global Interposer Technology Workshop

More than 25 years ago, Professor Rao Tummala founded Georgia Tech’s Package Research Center. However, his vision that advanced IC packaging technology would “graduate” soon and play a major role in the semiconductor industry didn’t come true for a long time. About a decade ago, the first generation of advanced packaging technologies — package-on-package (PoP) and system-in-package (SiP)... »

3D Stacking is Part of Life

3D Stacking is Part of Life

Sitaram Arkalgud, VP 3D technologies, Invensas, provided the entertainment at last week’s IWLPC 2015. As soon as he realized Phil Garrou wasn’t in attendance, he reverted to using the 2.5D terminology, despite the fact that on numerous occasions, I have voiced my disdain for the term, preferring “interposer integration.” Arkulgud responded to my catcalls from the audience with, “I’m mo... »

Chasing the Fan-out Wafer Level Packaging Rabbit at IWLPC 2015

Chasing the Fan-out Wafer Level Packaging Rabbit at IWLPC 2015

Sadly, this year it was the 3D session track that had lots of empty seats at the 2015 International Wafer Level Packaging Conference (IWLPC 2015), which was a bit surprising since 3D is really hitting its stride with so many products in high performance computing on the market. Next door, however, the fan-out wafer level packaging (FOWLP) session was a sold-out show. Both the keynote by GlobalFoun... »

TSMC’s Grand Alliance: A Powerful EcoSystem

TSMC’s Grand Alliance: A Powerful EcoSystem

On Thursday, September 17, I was invited to attend TSMC’s Open Innovation Platform (OIP) conference, that showed TSMC’s rapid progress and the power of TSMC’s Grand Alliance. As a former Alliance Manager, I really enjoyed seeing how TSMC’s far-reaching vision and strategic alliances, combined with excellent execution and customer service, made them the largest wafer supplier to fabless IC ... »

Spotlight on FOWLP, Monolithic 3D IC and 3D TSVs

Spotlight on FOWLP, Monolithic 3D IC and 3D TSVs

Fan-out wafer level packaging’s star is clearly on the rise as a low-cost solution for consumer mobile products, and the semiconductor industry trade news has been buzzing with unsubstantiated claims that Qualcomm is ditching through silicon vias (TSVs) for monolithic 3D ICs (M3D) in its next generation of cell phones. Meanwhile, it seems 3D TSV technologies have been moved to the back burner un... »

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