Search Results

Matches for your search: "fan-out wafer level packaging "

How 5G is Enabling a Connected World

It’s official. The world is becoming more data-driven by the second and everything – I mean EVERYTHING – hinges on the success of 5G. 5G will make smart factories more efficient; bring medical care to remote places; make the autonomous vehicle infrastructure possible so you stop rear-ending the person in...

Hot Topic: 2020 3D InCites Yearbook Editorial and Advertising Opportunities

We are preparing content for our 2nd annual print edition! 3D InCites is Looking for: Executive viewpoints on today’s megatrends and what’s needed to achieve them. Contributed Technology Features on topics like: Chiplet integration techniques Process improvements for panel and wafer-level fan-out Inspection technologies for heterogeneous integration (HI) Advancements in...

High-Performance IC Substrate Manufacturing Reaches an Inflection Point

Driven by advanced packaging substrate needs, the industry has reached an inflection point in IC substrate manufacturing. Increasing I/O counts are driving substrate layer counts to more than 20. Larger die sizes and multiple die mounted on the substrate are driving the need for larger body sizes, up to 100...

3D InCites Turns 10: A Brief Analysis of the 3D Journey

Yann Guillou, Applied Materials I cannot believe 3D InCites is already turning 10! As wise people say, time flies!  Taking a step back, I have to admit a lot of progress has been made since my first attendance as a young engineer to the EMC 3D workshops back in 2008....

IFTLE 398: Samsung’s 256Gb 3DS (TSV-Stacked) RDIMM; IMAPS 2018 in Pasadena

Samsung at the Leading Edge At the recent Samsung Tech Day, the company unveiled several new technologies: Their 7nm extreme ultraviolet (EUV) process node from Samsung’s foundry business SmartSSD – a field programmable gate array (FPGA) SSD, that will offer accelerated data processing and the ability to bypass server CPU limits...

The MSEC 2018 Technology Showcase: Who Owns the Data?

The competition was fierce and the stakes high for the annual MSEC 2018 technology showcase. which took place during the MEMS and Sensors Executive Congress, in Napa CA. The winner gets a free table next year and is expected to share their progress. After a rapid-fire session of presentations and...

Dr. Phil Garrou Makes the Move to 3D InCites

Yes. You read that right. It is my great pleasure to announce that Dr. Phil Garrou is joining 3D InCites as contributing editor and as a member of our esteemed technical advisory board. Like me, you may have noticed a pause in Phil’s missives on all things advanced packaging. While...

Diversification of Markets Calls for Hybrid Metrology with Multi-Sensor Technology

It used to be that people thought about metrology for front-end process control and inspection for advanced packaging. As wafer level packaging (WLP) and heterogeneous integration (HI) approaches became more advanced, metrology processes began creeping into back-end process control, where measurement becomes trickier and more diversified. As part of the...

TechSearch International Analyzes Trends in Packages for AI Applications

Artificial Intelligence (AI) combines both hardware and software.  TechSearch International’s latest analysis explains the packages behind AI applications. AI accelerators found in datacenters require high-density packages to support logic plus high bandwidth memory (HBM). Many silicon interposer designs are in mass production and Intel’s EMIB is also used.  Package-on-package (PoP) is used...

Leading Memory Chip Manufacturer Purchases Multiple Veeco AP300 Lithography Systems

PLAINVIEW, New York, July 9, 2018 – Veeco Instruments Inc. (Nasdaq: VECO) today announced that one of the world’s leading memory chip manufacturers has ordered multiple AP300™ lithography systems to support the fast-growing demand for DRAM with copper (Cu) pillars. The company selected the Veeco tools for their versatility in...