Samsung at the Leading Edge
At the recent Samsung Tech Day, the company unveiled several new technologies:
- Their 7nm extreme ultraviolet (EUV) process node from Samsung’s foundry business
- SmartSSD – a field programmable gate array (FPGA) SSD, that will offer accelerated data processing and the ability to bypass server CPU limits
- QLC-SSD for enterprise and data centers that offer 33%t more storage per cell than TLC-SSD
- 256-gigabyte (GB) 3DS (3-dimensional stacking) RDIMM based on 10nm 16Gb DDR4 DRAM
JS Choi, President of Samsung announced that Samsung will start wafer production of their 7nm low-power-plus technology using EUV. Samsung’s 7LPP technology reportedly delivers up to a 40% increase in area efficiency with 20% higher performance or up to 50% lower power consumption. They further claim the EUV process reduces the total number of masks by 20%.
In January, Samsung announced the production of Aquabolt, its 2nd-generation 8GB high bandwidth memory (HBM2). Aquabolt reportedly delivers a 2.4Gbps pin speed at 1.2V, which is a performance upgrade of ~50% compared to their 1st-generation 8GB HBM2 package. A single Samsung 8GB HBM2 package reportedly offers a 307 gigabytes-per-second (GBps) data bandwidth, achieving 9.6 times faster data transmission than an 8 gigabit (Gb) GDDR5 chip.
Samsung has now shown the world’s first 256GB memory modules for servers, based on 10nm, 16-Gb DDR4 DRAM stacking (36 memory chips on a single module, each with a capacity of 64Gb (8GB). Each of the 36 memory packages features four single-die 16Gb components, which are interconnected using through silicon vias (TSVs). This reportedly will double current maximum server DRAM capacity up to 16TB. Choi discussed this technology at the server forum in 2014 [link] where he showed the following process flow slide.
Samsung Foundry Business
For years IFTLE has been saying that if Samsung wants to be a major foundry player it could be. Last May they split off their foundry business and now there are reports that they are already in the #2 foundry position behind only TSMC. Business Korea reports that Samsung’s foundry sales this year will be more than $10B.
Business Korea reports analyst predictions that starting in 2019, Samsung’s foundry business will grow rapidly by winning ASIC contracts from a number of virtual memory developers and supplying application processors (APs) to Qualcomm and Apple. They report that Market research firm IHS predicts that the average annual growth rate of the foundry market (7.8%) will surpass DRAM (5.3%) and NAND flash (6.1%) by 2021.
The Latest from Pasadena
When those of my generation think of Pasadena they don’t think of technology – they rather think of “The little old lady from Pasadena”. Those you International readers or those in the US who are too young to remember the great Jan & Dean beach hit of the 1960s (not the Beach Boys – that is a common mistake) fear not, IFTLE will share this story with you.
The origins of “The Little Old Lady from Pasadena” stem from a TV ad campaign that the Dodge automobile company started in 1964 starring a white-haired elderly “grandma” speeding down the street driving a bright red Dodge muscle car. She would stop, look out the window and yell at the teenaged boys and young men staring at her car “Put a Dodge in your garage, Honey!”. The top hit song followed soon after.
“The little old lady from Pasadena
has a pretty little flower bed of white gardenias
But parked in her rickety old garage
is a brand new, shiny red, super stock Dodge
Everybody’s sayin’ that there’s nobody meaner
then the little old lady from Pasadena
She drives real fast and she drives real hard
She’s the terror of Colorado Boulevard
It’s the little old lady from Pasadena
If you see her on the street don’t try to choose her
You might drive a goer but you’ll never lose her
Well, she’s gonna get a ticket now sooner or later
cause she can’t keep her foot off the accelerator
Go, Granny, go, Granny, go Granny go!
Now that IFTLE has provided you this tidbit of Americana, let’s look at activities of the 2018 IMAPS conference which was held in Pasadena.
As noted previously by IFTLE, IMAPS is the oldest packaging focused non-profit organization in the US. This was their 51st Int Symposium led by General Chair Mark Gerber of ASE. There were >800 attendees on hand from 20 countries and 111 booths in the exhibition hall. More than 140 technical talks were presented over the three-day period. Over the next few posts, we will take a look at some of the presentations that IFTLE found most interesting.
Sub-micron RDL from Cannon BEOL Stepper
Cannon traces its entry into the packaging market to the introduction of its back-end-of-line (BEOL) stepper in 2011. In 2016 they introduced their 2nd gen BEOL i-line stepper the FPA-5520iV.
While current fan-out wafer level (FOWLP) processes mainly use design rules of 5µm L/S, next-gen is targeting 1µm and 0.8µm after that. In RDL-first FO packaging, the RDL layers are formed on wafers that are warped due to the plastic wafer molding process. This reduces the focus margin since the depth of focus is very small. The new steppers are reportedly equipped with a die-by-die tilt and focus compensation systems to handle up to 5mm of wafer warp. The tool has a 52 x 34mm wide imaging field that can overlay two 26 x 33 shots in a single exposure. For those moving into panel processing, they offer a panel handling option which reportedly can provide 0.8um resolution on 365 x 306 substrates.
AMD – Impact of Bumping on Chip – Package Interaction
Workers at AMD Austin shared their data on factors affecting the reliability of bumped chip packages.
The semiconductor industry is now focusing its efforts on implementing ultra-low-k (ULK) and extreme low-k (ELK) dielectrics (K, 2.5). The introduction of these fragile materials presents significant challenges to overall reliability due to the weak mechanical properties of the ULK/ELK materials interacting with rigid lead-free bumps.
The workers at AMD have examined several issues and their impact on the reliability of the overall C4 bumping process.
A “short” failure was examined and revealed solder had diffused into the copper (Cu) pad, formed Cu intermetallic compound (IMC), and IMC volume expansion broke the passivation and ILD. The solder continued to diffuse to the next line or layer to induce the short. EDX showed no under-bump metallization (UBM) under the bump. The assumption is that particles were on the pad before UBM sputtering. Later the particles were washed away during a clean process leaving a hole in the UBM on the Cu pad. Subsequent solder plating then put the solder in direct contact with the Cu pad and the failure sequence was initiated.
Thin Ti seed layer
If the Ti seed layer is too thin it will break when stresses are exerted upon it. This issue of thin Ti can be caused by too steep a sidewall profile.
This issue has been around a long time. I can recall Unitive (now Amkor) employees talking about this over a decade ago. PI cracking is initiated at the end of UBM undercut and will propagate through the PI and through the ILD (ELK) as shown in the figure below. Control of the etch process to reduce undercut as much as possible is required.
Other issues like UBM seed layer oxidation and photoresist damage were also examined.
For all the latest on Advanced Packaging and the IC technology that drives it, stay linked to IFTLE……………….