UCLA Samueli School of Engineering launches $125 million semiconductor hub with top industry leaders
May 29, 2026 · By Applied Materials · 3D In-Depth, Manufacturing
Design View all
SWAP Hub earns DoW Year 2 Award Investment from NSTXL
The Microelectronics Commons NSTXL (National Security Technology Accelerator) has announced the DoW Year 2 awards, with more than $200M invested across 26 projects nationwide and the Southwest Advanced Prototyping (SWAP) Hub earning continued support for multiple high-impact efforts already advancing U.S. microelectronics innovation. These awards recognize real progress and growing...
Engineering Copper Grain Structure for High-Yield Hybrid Bonding in 3D Packaging
Why copper grain size matters for hybrid bonding and how to control it for HBM and chiplets. Read the article here. Abstract Hybrid bonding is reshaping advanced packaging by enabling ultra-fine pitch copper-to-copper interconnects, essential for high-bandwidth memory (HBM), chiplet integration, and 3D heterogeneous systems. While alignment precision, oxide control,...
Devices View all
Navy’s Directed Energy Systems Integration Lab to Train Sailors on Laser Weapons
By Thomas McMahon Naval Surface Warfare Center, Port Hueneme Division, CA Sailors can now get certified in operating and maintaining the fleet’s most prevalent directed energy system through a new training program at Naval Surface Warfare Center, Port Hueneme Division (NSWC PHD)’s Directed Energy Systems Integration Laboratory (DESIL), with the first...
How AiP Technology Helps Enable 5G and More
For 5G smartphones and other millimeter-wave (mmWave) applications, antenna integration, either through antenna-in-package (AiP) or antenna-on-package (AoP) technologies, simplifies the challenges associated with designing products that operate at these high frequencies. A variety of AiP/AoP design methodologies provide the required form, fit, and function for these applications and can include...
Latest Posts - Page 9
Temporary Bonding and Debonding Technologies for Fan-out Wafer-Level Packaging
Fan-out wafer-level packaging (FOWLP) is a cost-effective way to achieve high interconnect density and to manage larger I/O counts within...
Fan-out Packaging Confirms its Success Story
Fan-Out packaging solutions have been the hottest topic in the advanced packaging industry for two years, and that will remain...
New Solution for Testing Chips Prior to 3D Stacking
Stacking chips on top of each other (aka 3D stacking) is a well-known approach to make more compact and powerful...
3D Systems-on-Chip: Clever Circuit Partitioning To Extend Moore’s Law
In recent years, the technology of 3D integration has evolved into an economically interesting road. In particular, the technology is...
Heterogeneous Integration Versus Dimensional Scaling: One Year In (Part 1)
Heterogeneous Integration Versus Dimensional Scaling; One Year In (Part 2)At SEMICON West 2016, the big story was the end of...
What is Driving the Growth of the Glass Material Market in Semiconductor Manufacturing?
Used either as a permanent or as a temporary material within the semiconductor manufacturing processes, glass plays a key role...
Announcing the Winners of the 2017 3D InCites Awards!
The 2017 3D InCites Awards program has turned out to be the most exciting yet! We had as many as...
Tech Session Highlights from ECTC 2017
Françoise promised in her recent blog that my ECTC blog would follow shortly. Finally, after attending DAC in Austin as...
Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP
For several years now, Herb Reiter, eda2asic, and John Ferguson, Mentor Graphics, have been evangelizing about the necessity of assembly...
Artificial Intelligence: A New Era of the Advanced Packaging Industry
Artificial Intelligence (AI) is driving the development of 3D TSV and heterogeneous integration technologies. With its new 3D TSV &...
The Dual-Gate Thin Film Transistor for 3D Dynamic and Flash Memory
Data is now the world’s most valuable resource. Solid-state storage of data is driving an innovation revolution built upon 50 years...
Part 2: IMAPS DPC 2017 Covers Range of High-tech Topics, including EDA
The keynotes outlined in Part 1 of IMAPS DPC 2017 Covers Range of High-tech Topics, including EDA were obviously very...
Wire-free Die-on-die Technology for Electronic Module Manufacturing in Implantable Devices
More and more applications are calling for miniaturized electronics to integrate high-performance devices in a limited volume. 3D technology is...
Advanced Substrates; Key Enabler of Future Advanced Packaging Solutions
“Advanced substrates are the key interconnect component of advanced packaging architectures,” comments Andrej Ivankovic, Technology & Market Analyst, Advanced Packaging...
3D ASIP Returns Under The IMAPS Umbrella for Its 13th Edition
In less than two weeks, the 13th Annual Architectures for Semiconductor Integration and Packaging Conference (3D ASIP) kicks off at...
What’s New for the 2017 European 3D Summit
For the fifth consecutive year, the European 3D Summit returns to Grenoble, January 23-25, 2017. The event has evolved over...
MEMS & Sensors Industry Group Reveals Tech Showcase Finalists
MEMS & Sensors Industry Group (MSIG)’s annual MEMS & Sensors Technology Showcase at MEMS & Sensors Executive Congress® 2016 (November...
SEMICON Europa Advanced Packaging Conference Looks at Consumer and Harsh Environment Packaging
System integration is moving forward. Denser and high performing systems require advanced packaging, assembly, and test players to move closer...
What is Driving the Advanced Packaging Market in China?
Driven by a strong semiconductor market outlook and aggressive investment in advanced packaging capability fueled by strong government support, advanced...