Convergence on the “Big Five”: Focus on Low-cost Flip Chip

Convergence on the “Big Five”: Focus on Low-cost Flip Chip

Ron_ Huemoeller_Color_Sep2015Part one of a five-part series. 

Over the past few years, there has been a significant shift from PCs and notebooks to smartphones and tablets as drivers of advanced packaging innovation. In an industry segment that has grown accustomed to a multitude of package varieties, we believe we are now headed for convergence into what Amkor calls “The Big Five” advanced packaging platforms. These include low-cost flip chip, wafer-level chip-scale packages (WLCSP), MEMS, laminate-based advanced system-in-package (SiP) and wafer-based advanced SiP. In this blog series, we will provide insight into each of these platforms. This first segment focuses on low-cost flip chip.

What is Flip Chip?
First, unlike the other four platforms, flip chip is not a package family or type, but a method of interconnect that uses bumps instead of wire bonds to connect the die to a package substrate. In the case of flip chip, connections are formed over the surface of the die area vs. the package perimeter, as is the case with wire bonds. At Amkor, flip-chip technology enables a number of ball grid array package families. Although WLCSP also uses interconnect bumps, the main distinction between a WLCSP and a flip-chip package is that the WLCSP does not have a package substrate; rather, after being bumped, the die is mounted directly on the printed circuit board.

While WLCSP has been the go-to package of choice to meet mobile product requirements, WLCSP reaches a point at which it is limited by its die size and the number of I/O it can support. According to Yole Développement, that magic number is roughly 500, typically in an 8x8mm² package. Many are viewing fan-out wafer-level packaging (FOWLP) as the solution to the increased I/O problem, as it enables higher density by expanding the footprint to slightly larger than die size, and is also thought to be lower cost than the flip-chip alternative; however, we disagree. We believe the low-cost flip-chip solutions emerging today to be more viable alternatives and to be the next package platform to pick up where WLCSP leaves off.

You may be surprised to see the words “low cost” associated with “flip chip,” because the early adopters of flip-chip packages were high-performance devices like CPUs, GPUs, and chipsets. However, as flip-chip processes have matured, the associated costs have subsequently come down, while still maintaining the performance benefits, making it the ideal platform for other devices such as RF, FPGAs, ASICs, memory, CMOS image sensors, LEDs and more. In fact, the newest low-cost flip-chip solutions are not only very cost competitive to FOWLP, but they are also competitive in thinness as newer methods continue to be deployed.

Additionally, despite the recent hype regarding FOWLP, it’s important to remember that low-cost flip-chip packages are currently dominating the advanced packaging market. Why? Because it’s still a better choice than FOWLP for most applications. In fact, FOWLP is currently only suited to a small percentage of mobile, wireless, medical, and military applications.

While many industry analysts proselytize that FOWLP is a lower-cost alternative to WLCSP than flip-chip CSPs (FCCSP), we find that FOWLP is lower cost only when the ratio of the package body size to the die size is nearly the same or only slightly larger. Figure 1 illustrates this well. The cost of the redistribution layer (RDL) is integral to the overall cost of the package. Standard WLCSP has the lowest-cost RDL impact, although as previously mentioned, its package size is limited to die size only. As the ratio of body size to die size increases, low-cost FCCSP structures become more favorable from a price point perspective. When the package body size is greater than 1mm more than the die size, the cost to redistribute at the wafer level becomes sufficiently high such that FCCSP is the best path for cost.

low-cost flip chip vs. FOWLP

Figure 1: As package to die ratio increases, there is more disparity between FOWLP and FCCSP.

Clearly, as flip chip continues to evolve, it remains more economical and more reliable than most fan-out packages. At Amkor, we believe our investment in low-cost FCCSP technologies has created economies of scale and is driving down the unit cost. Its use is expanding well beyond the computing, mobile and wireless markets; it is extending into automotive and medical, as well as the next big wave for low-cost applications: the wearable device market for the IoT. ~ R. Huemoeller

In our next segment of The Big Five, we will examine the future of the workhorse advanced packaging technology: the WLCSP.

Ron Huemoeller is the corporate VP of worldwide R&D at Amkor Technology