Latest Posts - Page 2
Building a Chiplet Ecosystem
The semiconductor industry’s decades-long adherence to Moore’s Law doctrine of doubling transistor counts on monolithic devices every 18 – 24...
An Epic Chiplet Evolution
Jean-Marie Brunet, Vice President and General Manager of the Siemens Hardware-Assisted Verification business unit finds himself and his group in...
IFTLE 545: Chiplet Definition and Standardization
I wanted this blog to cover the recent whitepaper by Siemens’ EDA division on chiplet model standardization, and it will,...
Advanced Packaging Authority John Park Discusses 3DHI and the World of Chiplets
John Park, product management group director, of Custom IC & PCB Group at Cadence, is a go-to authority on advanced...
Pre-Registration Opens for Chiplet Summit
SAN DIEGO, CA – December 9, 2022 — Chiplets Shorten Chip Design Cycles. Chiplet Summit opens pre-registration today for its...
Chiplet Designs and Heterogeneous Integration Packaging
System-on-Chip (SoC) integrates ICs (by reducing the feature size) with different functions such as central processing unit (CPU ), graphic...
Workforce Development Considerations in the Megachips Era
A recent Wall Street Journal article, The Microchip Era Is Giving Way to the Megachip Age, explains how the chip...
Chiplets and Sustainability
Advances in packaging can improve yield and reduce cost. Can they also reduce the environmental footprint of an electronic device?...
Thermal Analysis Techniques to Improve High Density Semiconductor System Performance
Thermal problems in semiconductor electronic systems often go unnoticed and cause failures. Although thermal problems can be understood and avoided...
IFTLE 530: Do Chiplets Increase Security Risks? Sony and Samsung Battle for Leadership in CIS
For those of you that haven’t seen it yet, a recent July 7th post by Ed Sperling is must read...
What I Learned At ECTC 2022
I’ve started so many event blog posts since the return of live events with the phrase – it’s good to...
IFTLE 521: AMD and Heterogeneous Integration
IMAPS DPC 2022 This year’s IMAPS Device Packaging Conference (DPC) was live once again, though most of the live attendees... IFTLE 520: Intel Responds to the Universal Chiplet Interconnect Express
In IFTLE 517, we discussed the upcoming standardization in the chiplet world with the passage of the Universal Chiplet Interconnect...
Five Key Workflows that Deliver 3D IC Packaging Success
The semiconductor industry is facing an inflection point as higher cost, lower yield, and reticle size limitations drive the need...
IFTLE 517: Chiplet Standardization Closer than ever with UCIe
The impressive industry grouping of ASE, AMD, ARM, Google, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC in early March announced...
2022 IMAPS DPC: Back and Better Than Ever
After two years of virtual conferences, it was great to be back in person last week at the 2022 IMAPS...
Leaders in Semiconductors, Packaging, IP Suppliers, Foundries, and Cloud Service Providers Join Forces to Standardize Chiplet Ecosystem
BEAVERTON, Ore.–(BUSINESS WIRE)–Advanced Semiconductor Engineering, Inc. (ASE), AMD, Arm, Google Cloud, Intel Corporation, Meta, Microsoft Corporation, Qualcomm Incorporated, Samsung, and...
Community Reflections: From Chaos to Opportunity
ASE, Inc. CEO, Dr. Tien Wu, has often referred to Sun Tzu’s legendary quote when describing semiconductor market volatility, “In...