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One look at the agenda for the 11th Annual 3D Architectures for Semiconductor Integration and Packaging Conference (3D ASIP), and it becomes clear that this year the conference organizers have left no stone unturned. Kicking it off with Pre-conference Symposia that emphasize 3D design tools and flow and manufacturing processes,...
In my previous post I talked a bit about the ongoing debate that went on during last week’s Global Interposer Technology Workshop (GIT 2014) which took place at Georgia Tech’s Global Learning Center. Do we wait for the “trickle down” effect to take place and bring the cost of interposer and...
I don’t know why it still surprises me to read conflicting reports on the progress of 3D TSVs. But I think Ron Huemoeller, Amkor, finally hit on it in his closing remarks during today’s webcast, “TSV Packaging at the Tipping Point”, moderated by Pete Singer, Solid StateTechnology/Extension Media. Huemoeller’s presentation and...
Manufacturing of 3D IC heterogeneous integrated modules for the electronics of a leadless pacemaker in a very small volume has been realized. Manufacturing of 3D IC modules using the described process is ready for medium volume production. Testimonial All the electronics of a leadless pacemaker has been integrated into a...
Each year since I first attended the IEEE Electronic Component Technology Conference (ECTC) in 2009, the keynotes, panels and papers focused on 2.5D and 3D integration technologies has increased; every year, that is, until this year. At ECTC 2014, there were not any plenary or panels focused specifically on 2.5D...
While GLOBALFOUNDRIES and STATS ChipPAC may have it all figured out, there are many who still consider temporary bond/debond (TB/DB) to be an unsolvable challenge that adds unnecessary cost. The solution? Find a way to do away with it altogether. During the 3D IC Forum at SEMICON Singapore, both A*STAR...
This week, at the invitation of SEMI Southeast Asia, I made the monumental trek from Phoenix, AZ to Singapore to attend SEMICON Singapore. While I know many of my industry colleagues make these journeys in the regular course of business, this was a new experience for me and my first...
For quite some time, the lack of cost-effective test solutions for 2.5D interposers and 3D stacked ICs (3D SICs) has been at the top of many industry experts’ laundry list of ‘what’s-holding-up-commercialization for 3D’. First, there are technology issues: fine-pitch probing, pin count, contact force and the phenomenon of weak...
Solid State Equipment LLC (SSEC), provider of single-wafer wet processing systems for advanced packaging (including 2.5D and 3D-ICs), MEMS, and compound semiconductor markets, announces two major wins for its WaferStorm platform at a leading foundry in Asia and a major US integrated device manufacturer (IDM). In both cases, the systems...
Don’t let the skeptics fool you, contrary to popular belief, the 3D test community has been hard at work on solutions for overcoming 3D test challenges. I am attending The Fourth IEEE International Workshop on testing 3D Stacked ICs (3D Test Workshop for short) at the Disneyland Hotel in Anaheim,...
