Naysayers be damned! Full commercialization for 3D ICs in smartphones may be a few years out, but that doesn’t dampen the spirits of the truly devoted, who latch on to every forward step as a monumental accomplishment. This week, progress appears to be taking off for 2.5D products, and the roadmaps and standards area are making notable progress. (If you can get excited about that, than you are a true believer. Welcome to the club.)
In and article titled Speeding 3D-IC to Commercialization: Update on SEMI Standards, published first in Chip Scale Review, and reposted on SEMI’s website, it’s clear from the opening line that author SEMI’s Standards guru, James Amano, is a card-carrying member of the 3D IC fan club: “The industry is poised to jump from concept to commercialization with 3-D technologies.” Despite his optimistic outlook, Amano recognizes that there are challenges that must be met, and that no one company can solve them all. Collaboration is the key (sound of loud drums beating). He writes, “Enabling these different processes, products and technologies to work seamlessly and cost-effectively together requires diverse, well-informed and effective industry standards.” The article goes on to give a detailed progress report 3Ds-IC SEMI Standards committee activities including the publishing of SEMI 3D1, Terminology for Through Silicon Via Geometrical Metrologyand the approval of SEMI Draft Document 5482, New Standard: Specification for Glass Carrier Wafers for 3DS-IC Applications. He also reports the activity of each task force, but if you want the details, go read the article. I don’t want to ruin the ending for you.
Future Fab International posted its ITRS Chapter on Assembly & Packaging, authored by Bill Bottoms of Third Millennium Test Solutions. In its section on 3D Integration, Bottom reports “There are now 3D packaged products using TSVs shipping in volume for cellphone cameras, for example, but high–volume production for complex 3D–SiP architectures are still only “demonstration” products.” 2.5 interposer products have reached volume production status, and Bottoms writes “These 2.5D products incorporate almost all of the processes and materials required for full 3D–SiP integration, where the full benefits of 3D are even more compelling.” Several companies have announced plans to ship 3D–TSV devices in 2013 that are Si–on–Si and involve low power with a limited number of layers in the stack due to thermal management concerns, among other issues. (These are likely high-end computing products, and not consumer products, which according to recent reports won’t go in to HVM until 2015).
And speaking of 2.5D reaching volume production status, Silex Microsystems, a MEMS foundry, and BroadPak, provider of ultra-high performance 2.5D silicon interposer and 3D integration technologies, announced availability of their jointly developed silicon interposer solution in HVM, bringing 2.5D capabilities to the mainstream market. The companies claim to have developed a cost-effective, ultra-high performance, reliable and high-yield silicon interposer that will enable a broader market to realize the benefits of 2.5D packaging as well as help accelerate adoption of 3DICs. The Silex/Broadpak solution (as it is being called by the companies) targets power, mixed signal, networking, consumer, microcontroller and embedded processor-based applications. Peter Himes, Vice President of Marketing and Strategic Alliances for Silex Microsystems says most companies don’t have the integration techniques and methodologies to start 2.5D IC design and current solutions are “too costly and high-risk to implement”.
“We are now enabling the mass adoption of silicon interposer by lowering the cost and providing the co-design, heterogeneous integration and the required supply chain infrastructure in a complete package.” said Farhang Yazdani, President and CEO of BroadPak.
So I hate to be the bearer of good news all the time (wait, no I don’t!) but there you have it! However small the increments, we are getting there. ~ F.v.T.