TSensors Summit

Catching Up With Steve Breit, Coventor, at the TSensors Summit

A journey of a trillion sensors begins with a single step.

TSensors 2

The TSensors Summit, held at Stanford University on 23 – 25 October 2013, was a showcase for the ideas and strategies that will lead the electronics industry to produce very high volumes of Microelectromechanical Systems (MEMS)-based sensors for use in new applications likely to enter the market in the coming decade.

There are currently several mega platform markets for MEMS sensors (and for the application-specific integrated circuits (ASIC), used to interface with them); most notable of these mega platform markets are smartphones, tablets, automobiles, and handheld consumer electronics products.  Together, along with all other markets for MEMS sensors, the unit volume of MEMS devices shipped in 2013 will be on the order of billions, or the low tens of billions.  (Nowhere close, yet, to 1 trillion.)

What will drive MEMS sensor growth from the billions to the trillions?  Entwined with the vision of producing a trillion sensors per year is the vision of the uses to which these sensors will be put to bring about a world of ‘Abundance.’  “Imagine a world of nine billion people with clean water, nutritious food, affordable housing, personalized education, top-tier medical care, and nonpolluting, ubiquitous energy. Building this better world is humanity’s grandest challenge.”

Per Dr. Janusz Bryzek, Fairchild  Semiconductor, chair of the TSensors Summit, achieving Abundance needs revolutions in the following areas: Health Care, Food, Energy, Water, Education and Freedom.

That’s all.

It was against this background that the 250 registered TSensors attendees, representing 100+ organizations from 14 countries, listened to 54 speakers describe visions for a trillion sensor world of Abundance.

(And to keep the Summit momentum going, TSensors has issued a call to action for those wishing to participate in what comes next.)

TSensors was also the background for catching up with Dr. Stephen Breit, V.P. of Engineering at Coventor, a provider of design automation solutions for micro-electromechanical systems (MEMS) and virtual fabrication of MEMS and semiconductor devices.Steve Breit Photo

With the semiconductor world increasingly going to 3D technologies (FinFETs, 3D NAND Flash, 2.5D and 3D IC) it’s apparent that CMOS designers could use some new tools to deal with 3 dimensional structures, and Steve had some interesting things to say about that during our conversation.

According to Steve, “MEMS never stand on their own; they’re always tightly integrated with an ASIC.”  The challenge is that the MEMS and ASIC design teams use two different sets of design automation tools for their work. In the case of the ASIC designers it could be an analog/mixed-signal design environment from Cadence, while for the MEMS designers it’s some kind of finite element analysis (FEA) tool that allows them to work with complex 3D mechanical structures.

(Remember that in the MEMS world models need to be capable of working with a variety of geometry options for MEMS devices – rigid shapes, flexible shapes, and beams and suspensions. MEMS designers create models of their designs by snapping together basic shapes like plates, beams, electrodes and electrostatic comb drives.)

Steve said that getting these two worlds to work well together has been something of a problem, resulting in too much time building and testing, and in too many design spins, all of which negatively impact time-to-market. The approach in the past has been to use home-built and hand-crafted MEMS device models created in a hardware description language like Verilog-A (compatible with the ASIC team’s circuit simulator), to get the MEMS design to ‘talk’ with the ASIC design.

Coventor logoCoventor recently introduced a new product, MEMS+ 4.0, to overcome some of these lost-in-translation difficulties. With MEMS+ 4.0, MEMS designers can create a model of their MEMS device in 3D and export it in Verilog-A, a format that’s compatible with simulators from Cadence and most other vendors.

These automatically generated Verilog-A models are very fast, and can easily combine mechanical, electrical and fluidic effects circuit and system simulations.

So what does that mean for 3D IC?

More than Moore technologies like 3D IC can be multi-physics systems, which the standard CMOS EDA tools don’t do – for those tools, everything is about voltages and currents,” commented Steve.

“CMOS designers usually don’t know about FEA and about multi-physics; for that, they need to reach into the MEMS world and use MEMS device models, like the ones MEMS+ 4.0 can provide, that are compatible with MATLAB, Simulink and Cadence simulators, for MEMS and IC co-design.”

As one of Coventor’s customers said about MEMS+ 4.0, “The robust model exchange between MEMS and ASIC designers enabled by MEMS+ reduces the probability of design error and can help avoid costly redesign iterations needed to address unexpected behavior.”

And in worlds where time to market rules, minimizing build and test cycles through the use of better design tools is a major key to success.

From Petaluma, CA, thanks for reading.

PFW

 

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