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Semiconductor packaging is a complex and evolving field, involving multiple disciplines. As a microelectronics packaging engineer, I focus on the “interconnect thread” from the chip to the system (Figure 1). To me, packaging is about interconnectivity (essentially). The primary function of packaging is to provide the interconnection from the IC...
Presentations to highlight breakthrough capabilities of EVG’s maskless lithography, hybrid bonding and IR laser release solutions for heterogeneous integration; EVG sees continued strong growth in region EV Group (EVG) today announced that it will highlight key advances in 3D integration process solutions, including hybrid and fusion wafer bonding, infrared (IR)...
In response to the rising costs of advanced nodes and the slowdown of Moore’s Law, major vendors – AMD, Intel, Apple, and Samsung – are making the shift towards chiplet-based systems using 3D technologies, which create novel system partitioning through modular and scalable architectures. These solutions optimize bandwidth with respect...
More than a few years ago, somewhere around 28nm, my working group was discussing the potential demise of “Moore’s Law”. The industry and international technology roadmap committee were struggling with hi-k metal gates, strain, FinFETs, and of course how lithography could keep shrinking. The designing and manufacturing of a system...
What an energizing week I had at IMAPS DPC 2023! I’ve said it before, but it’s worth saying again, the IMAPS Device Packaging Conference (IMAPS DPC) is one of my favorite annual events, and this year’s edition did not disappoint. There was a record turnout, great keynote talks, panel discussions,...
Severine Cheramy, Director 3D Business Development, at CEA-Leti, recently brought key partners of Leti’s 3D-IC programs together at the 6th 3D VLSI Open Workshop to give an overview of their accomplishments and to demonstrate synergies between their joint efforts. The event took place in mid-October at The DoubleTree Hotel in...
SEMICON Europa was an island in the vast sea of Electronica. It occupied one hall out of 18. But without that hall full of equipment, process, and material suppliers, the other 17 wouldn’t have any reason to exist. Think about that for a bit. There’s a reason “Semiconductors drive smart”...
Every year, I attend most of the events that are focused on 3D integration and related approaches to semiconductor advanced packaging. One thing that I’ve heard over the past year is that as 3D technologies move into manufacturing, it’s become difficult to recruit speakers who have fresh content. Notoriously slow...
For the first time since the 3D Architectures for Semiconductor Integration and Packaging (3DASIP) Conference was established, the organizing committee decided to acknowledge the work of two researchers who were instrumental in developing the core processes that enabled 3D TSV development. In a brief ceremony, Dr. Phil Garrou presented 3DIC Pioneer...
GEMINI®FB XT surpasses ITRS requirements for wafer bonding with up to 3X improvement in wafer-to-wafer alignment; enhanced productivity enables 50 percent increased throughput. ST. FLORIAN, Austria, June 30, 2014—EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today unveiled the...
