Matches for your search: "fan-out wafer level packaging "
While Apple remains the main customer for TSMC’s Integrated Fan-Out WLP (InFO-WLP), an increasing number of companies are adopting a large area version of FO on Substrate. HiSilicon has been in production with ASE’s FOCoS for several years and MediaTek just announced a logic device for networking applications using TSMC’s...
While the entire semiconductor industry is buzzing about explosive and sustained growth well into the 2020s driven by smart everything (homes, cities, industry), automotive electronics, artificial intelligence and more, what’s truly exciting is how we are going to support the connectivity of all those applications. 5G is where it all...
As each year passes, advanced packaging technologies offer more versatile solutions for cost-effective low-end applications, while 3D integration advancements continue to improve the performance of leading-edge products. This will be reflected at the 67th Annual Electronic Components and Technology Conference (ECTC), which takes place May 30, June 2, 2017, at...
Last week, I posted an executive summary of this year’s European 3D Summit, touching on the highlights and general takeaways based on the closing remarks I delivered at this year’s well-attended event, which took place January 23-25, 2017 at Minatec Campus in Grenoble. In this post, we’ll take a deeper...
In addition to attending the panel and plenary sessions at ECTC 2016, which took place May 31-June 3, 2016, I also spent a good deal of time talking to industry suppliers to get updates on their latest accomplishments that will impact the future of advanced semiconductor packaging, including interposer integration...
The Saratoga Springs, NY, horse racing season starts in late July, following a racing tradition that dates to the 1860s. That’s a pretty long run indeed, and it’s one of the things, along with the healing spring waters, successful Revolutionary War battle history, and “summering” by well-to-do Boston and New...
CIRCL-AP™ is a cluster tool with multiple modules, covering all-surface inspection, metrology and review at high throughput for efficient advanced wafer level packaging (AWLP) process control. The CIRCL-AP provides production-proven, high sensitivity monitoring capability for multiple AWLP applications including 2.5D/3D integration, wafer-level chip scale packaging and fan-out wafer-level packaging. Testimonial...
Amkor’s SLIM (siliconless integrated module) is a dies-last package technology providing the thinnest possible form factor with the highest level of integration by use of back-end-of-line technology combined with assembly-based fan-out architectures. It has optimal registration, 3D access to top and bottom side of package and the finest line RDL capability...
Last week (November 6) STATS ChipPAC issued a press release announcing that its advanced eWLB provides a platform for 2.5D and 3D technologies. In search of further information about this, I found a feature article recently published in Solid State Technology that explained how eWLB can be leveraged for 2.5D and...
Dr. Zhang, I think we have reached a verdict.
Bob Patti wrote in to confirm Anonymous Caller’s statement regarding polymer-filled, copper-lined TSVs, and also provided some additional data to support his comments. I’ve taken the liberty of paraphrasing his comments here:
With the caveat that he...
