Using a System Technology Co-Optimization (STCO) Approach for 2.5/3D Heterogeneous Semiconductor IntegrationJun 14, 2022 · By Siemens Digital Industries Software · Resource Library With the economics of transistor scaling no longer universally applicable, the industry is turning to innovative packaging technologies to support...
Co-Design Comes to ECTC 2018: You Can Lead A Horse to Water…Jun 12, 2018 · By Francoise von Trapp · Blogs Despite a valiant effort by the ECTC committee to integrate design topics into this year’s agenda, the number of empty...
SEMICON West 2015 Demonstrates the Powerful IC Manufacturing BaseJul 21, 2015 · By Herb Reiter · 3D In Context A few weeks ago, San Francisco’s Moscone Center hosted the Design Automation Conference (DAC 2015), with many EDA experts and...
Mentor Graphics: Xpedition Package IntegratorJun 30, 2015 · By Francoise von Trapp · Design Xpedition® Package Integrator provides a holistic co-design methodology that automates planning and optimization of connectivity from a chip through multiple...
SEMI-THERM 2015: Thermal Innovations that Make the World’s Technology CoolMar 31, 2015 · By Herb Reiter · 3D Event Coverage From March 16-20 the annual SEMI-THERM Conference (SEMI-THERM 2015) in San Jose gave me the opportunity to meet many assembly, materials,...
3D By Design: Are Path Finding Tools the Missing Link?Oct 01, 2014 · By Bill Martin · Blogs TechSearch International’s recently published 3D IC Gap Analysis report has a section for a new class of tools called Path...
Breaking Down Walls between Board, Package, and IC Design StepsMar 23, 2014 · By Herb Reiter · 3D In Context Many years ago, when I started in the semiconductor business, the circuit designers only had to worry about functionality and,...