Co-design

Co-Design Comes to ECTC 2018: You Can Lead A Horse to Water…

Co-Design Comes to ECTC 2018: You Can Lead A Horse to Water…

Despite a valiant effort by the ECTC committee to integrate design topics into this year’s agenda, the number of empty seats spoke volumes: Including two plenary sessions on design-focused topics was one thing; getting packaging and process engineers to attend was quite another. While I attended IC Package Co-Design for HI Systems and AI and Its Impact on System Design, I have to admit, I found ... »

SEMICON West 2015 Demonstrates the Powerful IC Manufacturing Base

SEMICON West 2015 Demonstrates the Powerful IC Manufacturing Base

A few weeks ago, San Francisco’s Moscone Center hosted the Design Automation Conference (DAC 2015), with many EDA experts and their customers focused on how to design the new wave of 10nm chips, this year and next. Last week the Moscone Center was buzzing again, this time with material suppliers, equipment vendors, and IC manufacturing experts, discussing how to ramp up production and improve yi... »

Mentor Graphics: Xpedition Package Integrator

Mentor Graphics: Xpedition Package Integrator

Xpedition® Package Integrator provides a holistic co-design methodology that automates planning and optimization of connectivity from a chip through multiple packaging variables, while targeting multiple PCB platforms. Engineers can quickly and easily assemble complete cross-domain systems (IC, package & board) and drive ball map plans and pin optimization through a rule-based methodology. Te... »

SEMI-THERM 2015: Thermal Innovations that Make the World’s Technology Cool

SEMI-THERM 2015: Thermal Innovations that Make the World’s Technology Cool

From March 16-20 the annual SEMI-THERM Conference (SEMI-THERM 2015) in San Jose gave me the opportunity to meet many assembly, materials, and thermal management experts. I also learned a lot about how IC packages and PCBs protect and cool single- and multi-die ICs. Both contribute significantly to cost, performance, and reliability of these designs. Let me share with you my general impressions f... »

3D By Design: Are Path Finding Tools the Missing Link?

3D By Design: Are Path Finding Tools the Missing Link?

TechSearch International’s recently published 3D IC Gap Analysis report has a section for a new class of tools called Path Finding, which are separated from the classical EDA tools. The classical EDA tools discuss implementation and verification for IC, package, and PCB. Path Finding tools are used well before the Implementation/Verification cycles begin and should help reduce the number of cyc... »

Breaking Down Walls between Board, Package, and IC Design Steps

Breaking Down Walls between Board, Package, and IC Design Steps

Many years ago, when I started in the semiconductor business, the circuit designers only had to worry about functionality and, after completing their job, “threw the design over the wall” to the layout team or contractor. As recently as 10 years ago, IC designers only had to worry about silicon performance and after verifying functionality and timing, they “threw the design over the wall” ... »