Many years ago, when I started in the semiconductor business, the circuit designers only had to worry about functionality and, after completing their job, “threw the design over the wall” to the layout team or contractor. As recently as 10 years ago, IC designers only had to worry about silicon performance and after verifying functionality and timing, they “threw the design over the wall” to the packaging team. In spite of increasing design complexities, more stringent constraints, cost- and schedule pressure, the temptation to “throw things over the wall” and be done with it, still persist in some cases and leads to suboptimal and costly solutions as well as missed deadlines.

At the recent 2014 IMAPS International Device Packaging Conference, John Park, Methodology Architect for IC, Package & PCB Co-Development, at Mentor Graphics showed that his team is putting an end to such sub-optimization and the resulting surprises. He was the last presenter in the 3½ day series of technical- and business presentations. John still managed to draw the audience’ attention to his way of breaking down these dreaded walls for IC design. Here is the slide he started with:

 Board, Package, and IC Design Steps

In my role as 3D-IC missionary since 2008, I have heard the term “Path Finding” many times, referring to different scenarios. I really like the slide above, because it conveys clearly what this term means for PCB, package and IC design, and why the “throw design over the wall” strategy is risky and can get really expensive.

In the following slides John illustrated, with a large number of screen-shots, that regardless of starting point – Board, Package or IC – the design-optimization process needs to reach across (or through) the walls to improve results. With path finding and co-design across multiple platforms, the design teams can quickly evaluate different implementation options for their domains and the related trade-offs. They also can gauge the cost of different alternatives and agree upon where and how to best meet challenging constraints.

This methodology not only produces better production designs, but also allows faster and more meaningful prototyping of designs, for feasibility analysis, cost estimation or other goals. In addition, the included visualization capabilities warn designers of potential congestions and other likely problems.

Bottom line: Formalizing the planning and optimization process with Mentor’s methodology results in incremental improvements, superior results and predictable schedules. ~ Herb

Herb Reiter

After more than 20 years in technical and business roles at semiconductor and EDA companies,…

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