Latest Posts
SPTS: Blanket Silicon Etch Process for Via Reveal
The blanket silicon etch process performed on the SPTS Rapier XE achieves an etch rate >8.5µm/min, high selectivity (Si:SiO>150:1), and is... SSEC: WaferEtch TSV Revealer
SSEC’s WaferEtch™ TSV Revealer is a single wafer wet processing platform for 3D IC and interposer wet etching applications designed...
SPTS Technologies Announces the Omega® Rapier XE System for 300mm Wafer Silicon Etch Processing
Newport, United Kingdom, 22 May, 2014 – SPTS Technologies, a supplier of advanced wafer processing solutions for the global semiconductor...
Process Improvements Target 3D IC Cost of Ownership
Customers have asked and suppliers are listening. One sign of progress from last year to this year at SEMICON Singapore’s...
3D Wafer Level Packaging: Outlook for 2014
In 2013, SPTS equipment sales into the advanced packaging market grew by 75%. Some of this was due to a... SSEC Introduces WaferEtch and WaferStorm Platforms to its Portfolio of Single Wafer Wet Processing Solutions at SEMICON West 2013
Unique Configurations Bring Improved Process Control, Lower CoO, and Higher Throughput to Pave the Way for Leading-Edge Technology Adoption Horsham,...
European 3D TSV Summit: Focus on Cost of Ownership
Now that the “technology bricks” for building 2.5D devices and 3D ICs have been essentially qualified, the focus has turned...
