thin wafer handling

Extending Moore’s Law through Advanced Packaging

Extending Moore’s Law through Advanced Packaging

The performance and productivity of microelectronics have increased continuously over the last 50 years due to the enormous advances in lithography and device technology. Today, these technologies are becoming prevalent in 3D packaging, which further enables advances in integrating various technologies (logic, memory, RF, sensors, etc.) in a small form factor. There are concerns with the sustainab... »

3D IC Commercialization: Glimmers of Progress and Push for Collaboration and Choices to Make

3D IC Commercialization: Glimmers of Progress and Push for Collaboration and Choices to Make

Recent signs that we’re getting closer to commercialization of 3D ICs? For one, analog and sensor IC company, ams AG, threw down the gauntlet, announcing it is investing more than €25M ($33M) to add manufacturing capacity for 3D ICs in its fab located near Graz, Austria. Analog 3D ICs featuring through silicon vias (TSVs) are already a reality at ams. The company introduced its first 3D IC int... »

More Tech Notes from 3D ASIP 2012

More Tech Notes from 3D ASIP 2012

Oh yes, where was I before the holidays took over and hijacked my life for two weeks?  I’ll bet you thought I was done reporting on 3D ASIP, but wait – there’s more! Point/Counterpoint on Thin Wafer Handling I already reported on Wilfried Bair’s (Suss MicroTec’s perspective on temporary/ debond bonding here. EV Group has also been working to overcome the thin wafer handling hurdles... »

3D Technology Features in Review

The latest digital issues of Chip Scale Review and  iMicronews’ 3D Packaging magazines hit the virtual “stands” last week, and perhaps in honor if the 3D ASIP Conference that gets underway later this week, there are some hot new 3D technologies being featured. But first, to bring everyone up to speed, Jan Vardaman and Linda Mathew, TechSearch International, co-authored an editorial titled ... »

The Great 3D Supply Chain Debate: The Handoff

The supply chain business model for manufacturing 3D stacked ICS has caused perhaps one of the hottest debates so far in commercializing 3D semiconductor processes.  It’s easy to see why. Beyond the rather obvious question of who will own the liability of damaged devices, there’s a good deal of revenue at stake for those who make the investment in adding capacity for middle end of the line (M... »

Brewer Science and SUSS MicroTec Jointly Commercialize ZoneBOND™ Technology for Thin Wafer Handling

Brewer Science, Inc., the inventor of ZoneBOND™ technology and world leading expert in materials and processes for thin wafer handling, and SUSS MicroTec, a leading supplier of equipment, are joining forces in commercializing ZoneBOND™ technology for thin wafer handling. SUSS MicroTec, market leader in room temperature debonding process equipment, is now offering the Brewer Science ZoneBOND... »

Fraunhofer IZM-ASSID’s System Approach to 3D

My recent visit to EV Group at its headquarters in Schärding, Austria, included some time spent with M. Jürgen Wolf, who, as part of his management and coordination of Fraunhofer IZM-ASSID (All System Silicon Integration Dresden) is the program & project manager for 3D Wafer Level System Integration (WLSI) and wafer-level packaging (WLP). There’s been a lot of activity going on with Frau... »

3D InCites’ Guide to Navigating theThird Dimension at SEMICON West

There’s no doubt about it, the 3D technology related workshops, lectures, and presentations happening at and around SEMICON West this year are plentiful and varied. There’s something for everyone: 3D metrology, 3D interconnect and standards development; 3D IC co-design, 3D bonding and thin wafer handling, 3D test solutions, commercialization of TSV and cost of ownership, supply chain conside... »