At the end of April, I attended the Internet of Things (IoT) Developers Conference at the Santa Clara Convention Center. Because our semiconductor industry is expecting that IoT applications will significantly contribute to revenue growth, I wanted to get the latest about: If, how, when, why and for which applications IoT designs will be introduced and ramped into high-volume production. General i... »
The keynotes outlined in Part 1 of IMAPS DPC 2017 Covers Range of High-tech Topics, including EDA were obviously very important, but a relatively small part of the entire conference. After the two keynotes on Tuesday morning, I listened to YOLE’s presentation, delivered by Santosh Kumar, and learned that the three big memory vendors (Samsung, Micron, and Hynix) jointly hold over 200 TSV patents ... »
The WeKoPa Resort near Phoenix was the venue for the latest IC packaging focused conference, IMAPS DPC 2017, which took place in early March. The exhibition floor and all the sessions I joined were well attended and covered a broad range of topics, including design tools and methodology demonstrations from both Cadence and Mentor Graphics (as of Friday, 3/31, officially re-branded “Mentor, a Sie... »
On March 15, 2017, TSMC held its 23rd Symposium, based on popular request, at the Santa Clara Convention Center. I had the opportunity to attend the entire symposium and want to share some of my impressions and facts learned with you. TSMC, by far the biggest pure-play foundry, has pioneered the transition from integrated device manufacturers (IDMs) to the fabless and foundry business model and ha... »
The 3D Architectures for Semiconductor Integration and Packaging (3D ASIP) conference is one of the biggest (if not THE biggest) event focused exclusively on the 3D IC family of technologies. The December 2016 event was held even closer to San Francisco airport than in previous years. From the lobby of the SFO Marriott Hotel, we could see planes taking off and landing. Every smooth touch-down an... »
In the past few months I have been reading a lot of depressing news about our semiconductor industry’s declining growth rates, shrinking profit margins, many consolidations, as well as many articles about why, when and how following Moore’s Law will be only justified for extremely high-volume designs. Sounds kind of depressing and worrisome for semiconductors, however, last week’s Internatio... »
California’s Pasadena is well known for the New Year Rose Parade and the Rose Bowl. There is no doubt: It takes commitment and organizational talent to make these events successful for 100+ years, and encourage every contributor to prepare and execute successful events every year. Last week’s International Microelectronics Assembly and Packaging Solutions Conference (iMAPS) in Pasadena’s Con... »
After a fairly long vacation it’s very hard to get back to work. That’s why I was really glad that this year’s OIP Symposium helped me – right after touring Europe for 3 weeks – to finding my groove again. Allow me to share some of my observations at and thoughts about the Symposium, from my “More-than-Moore EcoSystem builder” perspective. The collaborative innovation programs TSMC ... »
Shortly before the summer break started, I attended a number of industry conferences: MEPTEC, ECTC, DAC, MEMS & Sensors, ASME and SEMICON West. At all of them, I clearly noticed that our industry is looking beyond “Moore’s Law” to advanced IC packaging, multi-die ICs, and system scaling. However, at every one of these conferences, I also noticed the “Great Divide”: It’s difficult t... »
Part 1 of my DAC 53 reporting focused on this year’s really impressive keynotes, now posted on the DAC website, together with videos of other remarkable pavilion presentations, panels, interviews, demos, etc.…. Part 2 will cover a few highlights that I found very interesting and useful at DAC. Considering that this blog is being posted on 3D InCites, let’s talk about CEA Leti’s 3D network-... »
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