Flip chip and wafer level package (WLPs) shipments continue to increase. TechSearch International’s new study, 2015 Flip Chip and WLP: Emerging Trends and Market Forecasts, provides unparalleled analysis of what’s behind the numbers for the growth of flip chip and wafer level packages (WLPs). Highlighted are the trends in Cu pillar adoption and an explanation for its 29% CAGR. Emerging trends such as the adoption of fan-out WLPs (FOWLPs) and the trend toward panel level packaging are analyzed in-depth. The detailed analysis is based on the company’s 27-year history of studying markets and critical technology and infrastructure issues.
Flip chip has migrated from mainly high-performance devices found in supercomputers, servers, network systems, and PCs to the explosive growth in filters and RF devices found in today’s smartphones. In units, the compound annual growth rate (CAGR) from 2014 to 2019 is approximately 15%, while in number of wafers the CAGR is only 11% because much of the growth is for small size die. The industry is experiencing a transition from solder bump to Cu pillar, just as it moved from an evaporated bump to a plated process. While the transition to copper pillar is underway, SnAg remains the Pb-free solution of choice. Details of flip chip applications, bump types, and pitch trends are based on extensive interviews and research. Flip chip assembly choices such as mass reflow and thermocompression bond are discussed and underfill options are provided. Growth in gold bumping for LCD driver ICs is included. A critical analysis of planned capacity and utilization is provided for each geographic region.
Increased demand for thinner, lighter-weight portable products continues to drive WLP growth. These packages offer a small footprint and a low-profile solution that enables ultrathin consumer products such as smartphones, tablets, and wearable electronics. A detailed analysis of WLP shipments by device type, ball count, ball pitch, and thickness is provided. The CAGR for fan-in WLPs in units from 2014 to 2019 is almost 9% for the five-year period, while the CAGR in wafers is 10%. A number of companies plan to adopt FO-WLPs and projected demand and available capacity are highlighted.
The 135-page report with full references provides forecasts for the flip chip wafer bumping market by application, device type, FCIP/FCOB split, number of wafers, and number of die. Merchant and captive capacity is included and projections by bump type and wafer size are provided. Forecasts for WLP demand in number of die, wafers and device type are provided. Bumping, wafer level packaging, substrate suppliers and contract assembly service providers are highlighted with contacts provided. A set of 56 PowerPoint slides accompanies the report.
TechSearch International, Inc., founded in 1987, is a market research leader specializing in technology trends in microelectronics packaging and assembly. Multi- and single-client services encompass technology licensing, strategic planning, and market and technology analysis. TechSearch International professionals have an extensive network of more than 17,000 contacts in North America, Asia, and Europe. For more information, contact TechSearch at tel: 512-372-8887 or visit the website.
