Glass vs. Silicon Interposers for 2.5D and 3D IC Applications

There has been enough interest stirred up in R&D around glass as a low-cost alternative interposer substrate material compared with silicon, that there was an entire session dedicated to developments in that area at the 2012 IMAPS International Device Packaging conference, held March 5-8 in Scottsdale, AZ. 

Rao Tummala, of Georgia Tech’s 3D Packaging Center, started things off, touting the benefits of glass, especially with regard to cost savings. Tummala said that when TSVs are incorporated into active silicon, memory costs 25% more to manufacture, and that logic will be even more expensive. Rather, Tummala proposes what he calls 3D interposers using through package vias (TPVs) that are fabricated in either ultra-thin silicon or glass interposers at the same diameter and pitch as through silicon vias (TSVs) but without putting TSVs in the logic ICs themselves. This approach allows for stacking on both sides of the interposer with the same I/O pitch as TSVs achieving higher performance, lower cost, and simplicity in implementation. He also encourages using glass over silicon for the cost benefits.  

Georgia Tech has developed a polycrystalline wafer and panel interposer technology that Tummala said offers a 2x cost savings for the wafer version and 10x cost savings with the panel.  He reported Georgia Tech’s “groundbreaking accomplishments” in glass interposers including crack-free handling of ultra-thin glass, TPVs at small pitch, lower cost, double sided redistribution layer (RDL), small pitch Cu-Cu interconnection, and roll-to-roll ultra-thin (40µm)  glass,  and the ability to drill 1089 vias simultaneously using a laser process.

Next we heard from Jeb Flemming, of 3D Glass Solutions, who talked about the company’s novel glass/ceramic material that is processed using standard photolithography techniques in a three-step bake/expose/etch process that creates a patterned wafer that’s part glass and part ceramic. The ceramic is etched away to produce high density through glass vias (TGV). To date, Flemming reports the company has been successful in producing large arrays of 12µm diameter TGVs with 14µm center-on-center pitch, in 125µm thick glass ceramic. Additionally, the company has demonstrated the ability to fill the vias using a copper electroplating process, and reports void-free results at low volume. Currently, TGVs are costly to produce, notes Flemming, and this product offers a realistic alternative with alternatives over laser ablation processes. He says 20 different IC companies are evaluating them for interposer solutions.

Next, Asahi glass had its opportunity to showcase the benefits of its glass interposer TGV processes with a presentation by Shintaro Takahashi, who compared excimer laser microfabrication with a focused electrical discharge method. One of the advantages of the electrical discharge process is that there is no physical limit to minimum hole size.  Takahashi said this allows for higher aspect ratios than the excimer laser approach. It’s also a high throughput serial process requiring no masks with the possibilities for scaling up. In summary, he said the e-focused electrical discharge method demonstrated TGVs of 100µm pitch or less, with the potential to go further, as compared with excimer laser technology, which is limited to 50µm pitch or less.

The last glass hat in the ring was Corning Glass, who talked not so much about the via forming process, but the development of the glass substrate itself. Presenting on behalf of the company, Aric Shorey talked about the fusion process Corning uses to build ultra-thin, slim flexible substrates that he says are ideal for TGV.  Originally developed for the flat panel display market, the fusion process employed produces ultra-smooth sheets up to 3 meters, making it possible to provide wafers of almost any size – even up to 450mm. He said the smoothness feature is critical, as maintaining flatness and minimal substrate TTV is important for 2.5D and 3D IC applications.

With regard to through holes and what Shorey called “blind” holes – meaning they don’t go all the way through the substrate – he said there are many methods to make these holes in glass including mechanical, chemical, and laser based methods. He does not see via formation as a roadblock.  The process chosen depends on the via specification such as blind vs. through size and quality. What matters is that the substrate in which the vias are being formed is of high quality and has the strength and thickness required to achieve via specifications, thereby avoiding time consuming and costly manufacturing steps that call for additional handling.

During the 3D panel discussion later that day, there was not much mention of glass interposers as a manufacturing option. However the panel was focused on the supply chain issues of bringing currently qualified processes to high volume manufacturing. While glass interposers offer a compelling cost solution, we’re more likely to see them in the next-generation of 3D devices than the first; as the infrastructure to support volume production of glass interposers still needs to be established. As the first waves of 2.5D and 3D devices go into high-end computing and server applications, which are more concerned with performance benefits than cost issues, it may be the consumer applications that benefit from further development of the glass interposer option.