semiconductor

A Non-Techie SemiSister Tackles The Elusive Semiconductor Language

A Non-Techie SemiSister Tackles The Elusive Semiconductor Language

Not all SemiSisters are engineers. In fact, many of us joined this industry from a variety of career backgrounds with non-STEM educations including financial, business management, market research, marketing communications, journalism, and even liberal arts. For us, one of the greatest hurdles to overcome was learning a whole new lexicon of terms that get tossed about every day. In this humorous po... »

Trymax Launches New UV Curing and Charge-Erase Product Line

Trymax Launches New UV Curing and Charge-Erase Product Line

Trymax Semiconductor Equipment BV (Trymax), a global leader in plasma solutions for semiconductor manufacturers, announces the addition of an ultraviolet (UV) curing and charge-erase product line to its portfolio. The system called NEO 2000UV is a leading-edge dual chamber solution compliant with wafer sizes up to 200mm. UV curing and charge-erase equipment are used for a wide range of application... »

Advanced Packaging Technologies are Key for Semiconductor Innovation

Advanced Packaging Technologies are Key for Semiconductor Innovation

“2017 was an unprecedented year for semiconductor industry”, comments Santosh Kumar, Director of Packaging, Assembly, and Substrates at Yole Korea, part of Yole Développement (Yole).“The market grew by 21.6% year-to-year to reach a record of almost US$412 billion.” Under this dynamic context, the advanced packaging industry is playing a key role, offering huge opportunities for innov... »

Advanced Packaging Adds Value and Reduces Cost for Future Semiconductor Products

Yole Développement (Yole) confirms the consolidation of the advanced packaging industry, that is showing a steady growth in revenue of +7% between 2016 and 2022. “Advanced packaging is showing a total revenue CAGR higher than the total packaging industry (3-4%), semiconductor industry (4-5%) and generally the global electronics industry (3-4%)”, comments Andrej Ivankovic, Technology & Mar... »

EV Group Optimizes Resist and Lithographic Processing for Plasma Dicing for Advanced Semiconductor Packaging Applications

EV Group Optimizes Resist and Lithographic Processing for Plasma Dicing for Advanced Semiconductor Packaging Applications

EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it is demonstrating optimized pre-processing solutions for the implementation of plasma dicing for advanced semiconductor packaging applications. EVG’s latest products and process development services support this emerging semiconductor back-end fa... »

Atoms Don’t Scale: What is Beyond 7nm (2019)?

Atoms Don’t Scale: What is Beyond 7nm (2019)?

We have a guest contribution today from Brian Cronquist, MonolithIC 3D Inc.’s VP of Technology & IP. Brian discusses about MonolithIC 3D Inc.’s participation at Semicon West 2013. Thanks to everybody who came by the Silicon Innovation Forum poster session at SEMICON West 2013. We really enjoyed talking with you about all the exciting possibilities for new products and processes th... »

Georgia Tech PRC Proposes Industry Consortium on on 3D ThinPack (THInPack)

Georgia Tech Packaging Research Center (GT-PRC), through an industry consortium of about ~15 semiconductor, package and supply-chain companies from US, Europe and Asia, has been pioneering ultra-miniaturized electronics by Embedded MEMS, Actives and Passives (EMAP) Technology with chip-last (CL) interconnections but with chip-first benefits to demonstrate ultra-miniaturized modules with digi... »

Georgia Tech PRC and Its Industry Partners Demonstrate World’s Thinnest 3D Organic Package at 130um Thickness, Ready for POP and Stacking

Georgia Tech’s Packaging Research Center, in its pioneering chip-last embedded interconnection technology, demonstrates World's Thinnest 3D Organic Package at 130um thickness at 30um interconnection pitch using ultra-short copper-copper  interconnections and bonding below 200oC for highest electrical performance. The "Ultra-SLIM Packages have built-in vertical connections to the top surface »

Applied Materials and A*STAR’s Institute of Microelectronics to Drive Advanced 3D Chip Packaging with World-Class R&D Lab in Singapore

Applied Materials Inc. and the Institute of Microelectronics (IME), a  research institute under the Agency for Science, Technology and Research (A*STAR), officially opened the Centre of Excellence in Advanced Packaging at Singapore's Science Park II today. Singapore's Minister for Trade and Industry, Mr. Lim Hng Kiang, presided at today's opening ceremony.The Centre of Excellence in Advanced Pack... »