HDAP

Package Designers Need Assembly-level LVS Signoff for HDAP Verification

Package Designers Need Assembly-level LVS Signoff for HDAP Verification

While advanced IC packaging is a fast-growing market, comprehensive package verification still has a ways to go. Unique package connectivity issues, such as missing or misplaced interposer/package bumps/pads, pin naming and text labeling issues, and the like, require new and enhanced layout vs. schematic (LVS)-like verification techniques that can move across the entire package to ensure proper co... »

Implementing High-Density Advanced Packaging for OSATs and Foundries

Implementing High-Density Advanced Packaging for OSATs and Foundries

Moore’s law is increasingly difficult to maintain and is driving the growth of innovative high-density advanced packaging (HDAP) technologies in response to system scaling demands. These innovations are increasingly in the form of fan-out wafer level packaging (FOWLP) or multi-substrate / multi-device packages like interposers and system-in-package (SiP). New challenges come with these disruptiv... »

Getting IC Package Design Right the First Time

Getting IC Package Design Right the First Time

Once considered to be one of the simpler tasks in semiconductor device manufacturing, IC package design has become more complicated as it becomes more critical to the performance of the end-devices.  Market drivers are more varied than ever. Time-to-market is more critical than ever.  And advanced packaging options are more numerous than ever. In this exclusive interview with Keith Felton of Me... »

Solving the Design and Verification Challenges of High Density Advanced Packaging

Solving the Design and Verification Challenges of High Density Advanced Packaging

Today’s electronic products present new challenges to product development teams. As a result, there is a constant push to improve product quality and design efficiency through the use of new design technologies. For example, system-scaling demands change as Moore’s law becomes increasingly difficult to maintain, thus driving growth of innovative PCB and packaging technologies such as: High-den... »

Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP

Executive Viewpoint: Breaking The Chicken and Egg Cycle for HDAP

  For several years now, Herb Reiter, eda2asic, and John Ferguson, Mentor Graphics, have been evangelizing about the necessity of assembly design kits (ADK), similar to the process design kits (PDKs) for chip designers, to help drive ecosystem capabilities for what is collectively now being called high density advanced packaging (HDAP), comprising 2.5D IC, 3D IC and high density fan-out wafer... »

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

New Design Flow and OSAT Alliance Program Jump-Start High-density Advanced Packaging

Editor’s note: For several years now, Mentor Graphics has evangelized about the critical need for assembly design kits to enable commercialization of high-density advanced packaging technologies, such as fine line and space fan-out, 2.5D and 3D IC packages. With this week’s introduction of a unique, end-to-end, high-density advanced packaging (HDAP) design flow, combined with the launch of an... »

At 3D ASIP 2015, Variety is the Spice of Life

At 3D ASIP 2015, Variety is the Spice of Life

Staying relevant in the ever-expanding technology landscape that is the semiconductor packaging industry can be a struggle for an event that’s been laser-focused on one emerging segment since its inception. But this past week, 3D Architectures for Semiconductor Integration and Packaging  (3D ASIP 2015) delivered a program that not only addressed the progress of 3D integration, it also expanded... »