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EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it has received multiple orders for its comprehensive portfolio of manufacturing equipment and services designed to address the burgeoning demand for wafer-level optics (WLO) and 3D sensing. The market-leading...
On Thursday and Friday of last week, Monterey, California’s previous state capital, became the center of presentations and discussions about IC design challenges as well as latest innovations / progress made in the field of EDA tools and IC design methodologies at Electronic Design Process Symposium (EDPS) 2015. We also learned a...
Remember SEMICON West 2012? How could you forget? It was all clubbing with your customers at The Redwood Room, DNA Lounge, and The Endup after a few standout meals with them at Mission Chinese Food, Slanted Door, Wayfare Tavern, Acquerello, and Absinthe that were preceded by a few drinks with...
Despite efforts to leverage the one hour time difference from Phoenix to San Francisco to my advantage, I arrived on the scene at the 2014 3D ASIP Conference to find the morning Pre-conference Symposium on (Interposer) and 3D Design Tools and Flows already well underway. My absence did not go...
I don’t know why it still surprises me to read conflicting reports on the progress of 3D TSVs. But I think Ron Huemoeller, Amkor, finally hit on it in his closing remarks during today’s webcast, “TSV Packaging at the Tipping Point”, moderated by Pete Singer, Solid StateTechnology/Extension Media. Huemoeller’s presentation and...
BOISE, Idaho, Sept. 25, 2013 — Micron Technology, Inc. announced that it is shipping 2GB Hybrid Memory Cube (HMC) engineering samples. HMC represents a dramatic step forward in memory technology, and these engineering samples are the world’s first HMC devices to be shared broadly with lead customers. HMC is designed...
Not long after posting 3D IC Reality Check on Tuesday, I discovered that I missed one. If you haven’t read the post by SemiMD’s Mark Lepedus, Industry Inches Towards 3D Chips you should. While its got some similar information about recent announcements from GlobalFoundries as was in Rick Merritt’s post in EETIMES, it has...
But first, a 3D history lesson thanks to a recent SemiWiki blog post, Hybrids on BeO then, 3D-IC in silicon now, in which blogger Don Dingee recalls lessons learned from working with hybrid microelectronics assemblies, and how they apply in the world of 3D. Calling 3D ICs “the modern version of...
So here I am in Honolulu with my family, celebrating the return of my nephew from a 6 month deployment on a nuclear submarine, and I realize that the co-located IEEE Symposia on VLSI Technology and IEEE Symposia on VLSI Circuits is taking place at the SAME TIME, and there's...
In the world of semiconductors and microelectronics, a trend to vertically stack integrated circuits (ICs) or circuitry has emerged as a viable solution for meeting electronic device requirements such as higher performance, increased functionality, lower power consumption, and a smaller footprint. The various methods and processes used to achieve this...
