Processes and Technology

SSEC: WaferEtch TSV Revealer

SSEC’s WaferEtch™ TSV Revealer is a single wafer wet processing platform for 3D IC and interposer wet etching applications designed to reduce processing and capital equipment costs. The WaferEtch features superior uniformity of silicon thickness (as low as -/+ 0.7%). Testimonial Via reveal is a critical process step in 2.5D...

Lasertec: BGM300

The BGM300 was designed to enable quick and accurate measurement of Through Si Via (TSV) depths, Si wafer thickness, and Remaining Si Thickness (RST) above TSVs – all essential in a managed backside via reveal process flow. Back grinding errors due to “blind” grinding can lead to significant yield loss....

Rudolph Technologies: JetStep S Series Lithography System

As advanced packaging facilities transition their manufacturing from round wafers to square panels, the JetStep S Series Lithography System is fully capable of handling panels up to Gen 3.5 (720x650mm). The system offers high throughput through a large printable exposure and increased productivity through on-the-fly autofocus for thick photoresists. Testimonial...

Polymer filled TSVs, Courtesy of EV Group

Polymer Filled TSVs: Solving the Cu Stress Issue

I’ve been on a quest to find out more about EV Group’s new polymer filled TSVs since they first announced it in September. According to a company press release, NanoFill™ process is said to provide “void-free via filling of very deep trenches and high-aspect ratio (HAR) structures, and is suitable...

The Back Story on Besang’s True 3D ICs

BeSang Inc, a fabless semiconductor company in Beaverton, OR, has been on my 3D IC radar since 2008, when I first edited a 3D technology cover feature in Advanced Packaging Magazine, written by George C. Riley, that included a status report on BeSang’s TRUE 3D ICs™, which had just been...