The constant demand for miniaturization, added functionality and increased performance of electronic devices systematically drives higher integration by adding more devices on a single chip. In addition, 3-D or 2.5-D packaging, require on-chip or in-package capacitors, not only in traditional integrated circuits but also for integrated components, possibly on interposers, such as decoupling capacitors, voltage stabilization or RF filters.
For all these applications, the capacitors need to be fully solid state to meet the requirements of stability and lifetime. Fully solid state capacitors have faster charge- and discharge rates compared to a liquid electrolyte capacitor (supercapacitors), making them more useful for high-frequency applications. Beside bulky ceramic discrete capacitors, the simplest realization of a capacitor is the parallel plate capacitor, but since capacitance is proportional to surface area, the parallel plate capacitors are limited by their footprint area. Increasing the capacitance requires consuming precious space on the chip, or other cost-increasing and partially reliable methods. This limits the potential for implementation of integrated capacitors.
The more attractive implementation of high-density capacitors presented here rely on the unique combination of the intrinsic electrical and surface properties of carbon nanostructures and the ability of the unique proprietary technology of Smoltek to grow vertically aligned carbon nanofibers at temperature compatible with CMOS technology directly on the active chip or underlying substrate or component sustaining a thermal budget of less than 400°C.
The novel capacitor is thus made of carbon nanofibers as one electrode material, providing a large 3D surface area for a small footprint, and their conformal coating of dielectric and metallic counter electrode. The resulting capacitors have a total height of about 10µm, measured capacitances per footprint area ranging from ~10nF/mm2 to µF/mm2. Therefore they represent a credible solution in the heterogeneous integration landscape, proving truly solid-state and 3-D capacitors for on-chip integration.