Sitting in the bus on the way back from Grenoble to Airport Lyon, I am reflecting the last two days during which we honored Gilles Poupon, the Advanced Packaging “Pope” of CEA Leti. Upon his retirement at the end of November 2017, somehow an era ends.
I have known Gilles for quite a long time: He reminded of the first time we met. It was 2003 in Munich. Gilles was a member of the CEA delegation for the assignment ceremony of the very first cooperation contract between Fraunhofer and CEA with Leti´s former director, Jean Therme, and Fraunhofer´s former President Hans-Jörg Bullinger. CEA´s Jean-Pierre Joly and I were initiating the collaboration on guess which subject: 3D Integration and Wafer Level Packaging!
Yesterday, invited guests from all over Europe gathered to attend CEA presentations and tour NANOTEC. The the first day of the conference included a wonderful dinner at a lovely small gourmet restaurant with international colleagues of Gilles and his boss Jean-Rene Lequepeys, VP CEA Leti.
On the second day there was a high-level “Seminaire European Dream Team on Packaging” with the following speakers:
I thank Gilles for being an excellent manager of packaging activities; while stringent, he provided a very polite and friendly atmosphere in corresponding committees! In addition to his job a CEA-Leti, Gilles held many other international chair positions including General Chair of the international key conference for advanced packaging and 3D Integration, the IMAPS international device packaging conference (IMAPS DPC). As this year’s General Chair for IMAPS DPC 2018, I thanked him on behalf of the IMAPS DPC committee and invited him – despite his well-deserved retirement – to serve as Past General Chair for the upcoming IMAPS 2018 in Scottsdale, March 6-8, together with Rozalia Beica. Gilles accepted and so we will have again a great team. ~ P. Ramm
About Gilles Poupon
GILLES POUPON (M’05-SM’10) currently holds the position of International Expert on Advanced Packaging and 3D Integration at CEA-LETI in Grenoble (France). He has extensive experience in technologies relating to smart system packaging, 3D integration and heterogeneous integration technologies (SiP, Wafer Level Packaging, Flip-Chip, Fine Pitch Interconnection, Solder Bumping, Thermal Management, Packaging for Microsystems and MEMS). In the course of his involvement in packaging, he has worked on specific technologies based on wafer level processes, fan-out WLP, fine pitch & high-density interconnections, TSV processes, direct bonding, micro-cooling).
Gilles received his formal education at University of Grenoble and Conservatoire National des Arts et Métiers in Paris. He received his M.S. in Electrochemistry in 1985. He joined CEA-LETI in 1987. Since 2004, Gilles has served as Director of Strategic Programs on Advanced Packaging at CEA-LETI. Subsequently, he became the Head of the High-Density Interconnection and Packaging Laboratory at LETI.
Gilles Poupon has been active in electronic packaging since 2001. He has been a Senior Member of IEEE (SM’10) and Chair of IEEE-CPMT French chapter since 2014. He worked in establishing the IEEE workshops in France and he has been active on the technical committees for ECTC and ESTC. He is the General chair of ESTC 2016 in Grenoble, France. Additionally, he is the Technical Director of the French chapter of IMAPS since 2006 and involved in the technical committee of IMAPS events. He was the Technical Chair of conference EMPC 2013.
Gilles Poupon is a Scientific Advisor of EURIPIDES (European cluster on packaging) and committee member of Smart System Integration Conference and Semicon Europa – Advanced Packaging Conference. He is also a member of IEEE-CPMT Heterogeneous Integration Technology Roadmap Working Group (previously ITRS Assembly & Packaging Technical Working Group), iNEMI and ESIPAT (European SEMI integrated Packaging Assembly and Test group). He has published two books (Hermes Science; 2008 and 2011) on advanced packaging and new processes for interconnections. He has authored several chapters of books and co-authored and authored over 60 proceedings papers, review and journal papers. He has more than 10 patents in the field of advanced packaging, microsystems technologies, and 3D integration.
Since 2012 he served as a Member-at-Large Region 8 of the CPMT Board of Governors. During this term on the BoG he promoted IEEE EPS in Europe (workshop organizations, conferences, exhibitions,…) and he has participated in membership development. He has been requested by the IEEE EPS board to organize ESTC 2016 conference in Grenoble. This event has been meticulously and attentively prepared in collaboration with all of the CPMT European chapters.