Invent, Innovate, Implement continues to be the mantra at EV Group, supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets. In visits I’ve made to EVG’s Schaerding, Austria world headquarters over the years, it’s clear that this Triple I approach is working for the company, which has experienced consistent growth.

While I was sufficiently awed by EVG’s latest additions to its home campus, I was also interested to learn about technology advancements the company has made in the past year or so to further enable commercialization of 2.5D and 3D ICs.

Thorsten Matthias, EVG’s business development director, filled me in on the imminent launch of a high volume manufacturing (HVM) photoresist processing platform targeting “lithography for interconnectology” processes (also known as mid-end) comprising a complete suite of tool modules for photoresist processing applications including coaters, mask aligners, developers, metrology and photoresist strip (Figure 1).

Triple I
Figure 1: “Interconnectology” process steps. ( Source: Yole Developpment)

Matthias explained that the new platform, the EVG150 XT will accommodate nine process modules, which enables high throughputs of up to 100 wph also for thick resist applications in wafer bumping. “Different processes take different amounts of time. We discovered that with nine process modules, you can optimize process time so there aren’t idle modules,” he explained. “We’ve addressed both the hardware and the software to enable customers to make the best use of the equipment.”

One of the 3D processes EVG recently developed that can be performed on this tool is it’s polymer Nanofill process, which is an advanced coating process for improved through silicon via (TSV) reliability, explained Matthias. It involves using a polymer to fill Cu-lined TSVs to create a stress buffer layer (Figure 2). The initial target is larger vias for interposer and CMOS image sensor applications, but Matthias said they are not ruling it out as a solution for higher reliability in high density TSVs in the next few years.

Figure 2:  Comparison of Nanofill via filling results with standard spin coating. (courtesy of EV Group)
Figure 2: Comparison of Nanofill via filling results with standard spin coating. (source: EV Group)

I spent a good deal of time in August visiting Dynaloy and learning about its CoatsClean process. At EVG I was able to learn more about the equipment side of the CoatsClean story. EVG built a dedicated single wafer resist stripping system for CoatsClean. The heart of the system is the point-of-use heating of the strip chemistry, which accurately controls the interaction between strip chemistry and photo resist. A quick spray rinse step follows to completely remove residue. This process/tool combo can be used for TSV, microbumps, and Cu pillar cleans.

Matthias then turned the floor over to Markus Wimplinger, EVG’s corporate technology development and IP director, who focused his presentation on technology innovations involving fusion bonding for Si Photonics and monolithic 3D, as well as hybrid bonding for wafer level 3D – all areas of interest for EVG as its permanent bonding tools lend themselves to these areas.

Wimplinger shared a success story from 2006, when EVG put a plasma activation system into the R&D center at UC Santa Barbara (UCSB) for fusion bonding of compound semiconductor 3D optical interconnect devices. It was demonstrated that optical interconnects can achieve date rates not possible with conventional interconnects, and could enable cost effective high speed I/O for data-intensive applications. “In 2014, Si photonics can be the solution to eliminate the data bottleneck in servers,” said Wimplinger, adding that many companies are all working on solutions.

Wimplinger also talked about layer transfer processes for monolithic 3D based on wafer bonding. According to Wimplinger, this process requires fusion bonding, and can be accommodated using the EVG’s Gemini FB for face-to-face alignment.

Triple I
Figure 3: The layer transfer cut process developed by Monolithic 3D. (Sources: EV Group and MonolithIC 3D)

Up until recently, this process has faced uncertainty because to process transistors and circuitry on these bare layers requires high temperatures that could degrade the underlying transistors and circuitry of the fully processed wafer. Wimplinger said a solution to this is to use laser annealing. This way the circuitry underneath is not damaged. Laser annealing has become a more available technology because its being used e.g. for processing backside illuminated CMOS image sensors (BSI CIS).

Another reason we haven’t seen monolithic (also called sequential) 3D processes taking hold yet is due to potential yield issues. Wimplinger explained this is due to the die being generated sequentially, which increases the total number of process steps per wafer and thereby potentially results in lower wafer yield. However, “It could be an interesting technology 7 or 8 years down the road,” noted Wimplinger.

Example: Sony ISX014 cross section of BSI CIS (image courtesy of EV Group)
Example: Sony ISX014 cross section of BSI CIS Source: IEEE 2012)

Hybrid bonding is another area of focus for EVG, particularly with the arrival of 3D BSI CIS on the scene in HVM. This technology is a true 3D IC because it requires two layers of active circuitry to be interconnected. It also uses different technology nodes. The pixel layer can be manufactured using lithography processes. Additionally, wafers can come from different fabs. “This is a very nice example of where the promise of 3D comes to fruition,” said Wimplinger. “It enables optimization of process flows and process nodes. It’s a comprehensive way to make a better chip.”

Hybrid bonding creates a dielectric and metallic bond at the same time, optimized in a way where we can prepare surfaces simultaneously for bonding, electrical connectivity and mechanical strength. EVG provides the plasma activation and high bonding strength at low temperatures.

Ziptronix’ direct bond interconnect (DBI) is an example of a hybrid bonding technology. Another is an organic dielectric, low density, metal/adhesive via first 3D bond developed by RPI. In-house, EVG has developed a low-temp Cu-Cu bond that forms the bond in less than 30 minutes.

The tool required to perform this hybrid bond is the Gemini FB, and inspection is done in the EVG40NT measurement system. According to Wimplinger, the company has achieved sub half micron alignment accuracy for wafer-to-wafer integration in HVM due to the closed feedback loop between alignment and measurement system.

The day would not have been complete without a few words on my favorite topic, the ongoing temporary bond/debond issue. Wimplinger talked about taking a solution–oriented approach to solving the debond challenges. He acknowledged that there is no solution that meets all of the requirements yet, but if the capabilities of TB/DB are accepted, they can be in production today even at 300mm.

A solution oriented approach to tackling this challenge is to fine-tune the backside processes so that they can deal with the thermoplastic materials, said Wimplinger. “We have to go through the effort of accepting and fine tuning boundary conditions.”

To this end, EVG is working with multiple material suppliers. The materials include thermoplastic and crosslinking adhesives. While the perfect solution hasn’t arrived, Wimplinger says he is confident that working in close cooperation with the customer and materials supplier to find the solutions that work best.

The Tour

In his presentation, Matthias touched on the value of creating a fully automated fab environment in EVG’s new cleanroom, as well as its updated existing cleanrooms. The advantage is that customers can run processes in a fab-type environment and emphasize process control, he explained. They can develop baseline recipes for individual process steps to develop a process of record in house. “There’s a huge time-to-market advantage; a half a year or more,” he said. “It’s been very successful.”

We took a group tour of the new class 100 cleanroom, where I was able to see some of the tools we’d discussed in action. For me, since I had first seen the first prototype of the EVG850TB/DB XT HVM temporary bond/debond system on the manufacturing floor when I visited in 2011, seeing the same tool in action in the cleanroom completed the story for me. The fact that it also won the 3D InCites Award for equipment made it that much more exciting. Markus Wimplinger put the tool through its paces, demonstrating the high throughput operation with 9 process modules. The in-line metrology feature for inspecting adhesive thickness is probably one of the coolest features of this tool, because it allows for 300,000 points resolution, which delivers more accurate results with more data to help in process optimization. “It’s critical to scan at very high resolution. You can fool yourself about TTV,” explained Wimplinger. “Ours is the only one that can measure 100% of the wafer at high resolution in less than 90 seconds.”

Figure 4: A comparison between a 300,000 points scan and a 49 point scan. (image courtesy of EV Group)
Figure 4: A comparison between EV Group’s 300,000 points scan (left) and an industry standard 49 point scan (right). (Source: EV Group)

My visit concluded with a late lunch in EVG’s new company restaurant, which is situated right next to the new kindergarten. Construction continues. I saw glimpses of a courtyard garden. I look forward to a return visit to see what they’ve come up with next. ~ F.v.T.

Francoise von Trapp

They call me the “Queen of 3D” because I have been following the course of…

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