Executive Viewpoint: Lithography’s Rising Star in the Year of the Fan-Out Package

Executive Viewpoint: Lithography’s Rising Star in the Year of the Fan-Out Package

Rezwan_v2_RGBThere is no doubt about it, 2016 is turning out to be the year of fan-out wafer level packaging (FOWLP) as the entire semiconductor industry turns to advanced wafer level packaging and system-in-package solutions to take the world to its next generation of connectivity, in which our smartphones drive our lives, and the Internet of Things becomes a reality. While lithography is often thought of as a front-end process, the reality is that it’s a critical part of the advanced packaging success story, beginning with the dawn of flip chip packaging in the late 1980’s.

Throughout it all, one manufacturer of lithography steppers, Ultratech, saw the writing on the wall and got a running start as the supplier for advanced packaging lithography processes in the early 1980’s, owning a solid 90% install base market share. 3D InCites sat down recently with Rezwan Lateef, VP and General Manager, Ultratech, to learn more about the company’s philosophy and thoughts on the future.

 The Back Story
According to Lateef, Ultratech got its start building 1x steppers with a simple, low-cost optics design for front-end-of-line (FEOL) lithography back in 1979. During the 80s, they provided nearly 1000 1x steppers with resolution down to 1µm to the industry as they transitioned to projection lithography for their newest microprocessors. By the late 80’s, due to the progress with Moore’s Law, resolution requirements dipped below 1µm. Companies like Canon and Nikon introduced reduction steppers with more complex optics that could achieve resolutions well below 1µm and aggressively competed for market share. In response, Ultratech developed a strategy to provide a cost effective solution for non-critical front end of line process steps. The company dominated this “mix-and-match” market in the mid-1990s. However, eventually, the non-critical layers also went below 1µm.

Rather than try to compete in this space by developing new optical designs, and subsequently adding higher cost-of-ownership to its tools, Ultratech CEO, Arthur Zafiropoulo, had the vision to focus the companies’ efforts on developing tools specifically targeted for the then-emerging advanced packaging market. He saw where advanced packaging was headed, and had the stick-to-itiveness to go the distance; even though it took much longer than originally expected.

As a result, Ultratech was one of the first companies with front-end beginnings to take the leap and focus extensively on the advanced packaging market, in addition to the MEMS, TFH, power, LED lithography applications. The company found its sweet spot in resolutions suited to the needs of back-end-of-line (BEOL) applications like wire bond pad exposure, flip chip, Cu pillar, and RDL. This was all accomplished by utilizing their unique 1x optical design and keeping costs significantly lower than front-end steppers. Since the late 1990’s, Ultratech has dominated the advanced packaging market for steppers with nearly 500 tools in the field.

Addressing Fan-out Challenges
“Fan-out technologies are predicted to have an amazing 5-year CAGR of 63% through 2020,” said Lateef. “One advantage of our head start in the advanced packaging market is that we have a complete understanding of the challenges our customers face. Those include overall application costs, as well as technical challenges like finer line and space (L\S), features for redistribution layers (RDL) and wafer warpage for reconstituted wafers.”

 While some front-end players are entering the market with their technology, the costs and processing capabilities of their solutions are not aligned with BEOL needs. FEOL lithography tools, having been developed specifically for the demanding imaging requirements of very high-resolution applications, come with a very high initial tool cost and lack the required large depth of focus and wafer handling flexibility needed to be successful in BEOL advanced packaging processes.

Lateef explained that there are several unique process challenges that must be addressed to provide a successful lithography solution for BEOL advanced packaging applications. One significant difference between FEOL and BEOL lithography requirements is that FEOL chip imaging requires very high resolution, complex optical designs, whereas the optimum solution for the thick polyamide and resist films encountered in advanced packaging lithography is a lower resolution optical system with a large depth of focus. This makes the Ultratech 1x optical system ideal for advanced packaging lithography with the added advantage of providing a simpler and lower cost solution.

Additionally, as mobile device package designs have driven advanced packaging technologies to become more complex, new processes like FOWLP now require managing wafers and reconstituted fan-out substrates with up to 6mm of warpage, chip-to-chip placement errors, and large topography variations.

Die placement is another major issue for advanced fan-out packages. With fine line and spacing, each die must be accurately placed in the molding compound, and there has to be co-planarity of the die to maintain consistency in the XYZ-directions. Otherwise, it is difficult to effectively route the RDL lines. An even greater challenge is ensuring that the reconstituted wafer is not too warped for even the BEOL tools to handle.

“Lithography can compensate for some of these errors by providing full wafer mapping of actual die locations and then determines how to best pattern the lines between them,” noted Lateef. “However, there are still improvements that can be made with regards to the other elements, such as molding compounds, die placement tools, etc. Lithography can help, but it can’t solve everything.”

Due to its performance, cost-effectiveness and ability to address heterogeneous integration, he predicts FOWLP will delay the large-scale adoption of interposers and TSVs out further in the future. It also drives packaging lithography technology to a new era with resolution requirements down to 1µm or lower. “In the next generation FOWLP, we can expect to see multiple processors connected together with passive devices. This will necessitate better tool performance to deliver increasingly tighter line and space feature sizes which could eventually reach 1µm,” said Lateef.

 Is Fan-out Panel Processing in Ultratech’s Future?
While less than a year ago, the jury was still out on the necessity for panel processing vs. wafer for fan-out technologies, this sudden burst in expected volume has many focusing on fan-out panel processing as a way to reduce overall packaging cost. Lateef, however, is still cautious about its success.

While Ultratech did develop a prototype panel system a few years ago to evaluate performance capability, Lateef says the industry still has not standardized around a specific panel size and there are serious questions about the design rules for L/S and warpage control. In other words, there is still much work to be done before determining that it’s worth the investment. As such, he says Ultratech will continue to monitor the industry’s movement toward standardized panel processing design rules before moving to commercialize their panel processing product.

Wrapping it Up
From Ultratech’s perspective, it’s been a long but worthwhile ride. Lateef is excited to see the industry making decisions about future technologies based on what advanced packaging technologies deliver. He credits a leading foundry and other leading OSATs’ FO offerings for developing significantly advanced packaging platforms that will challenge the market to develop increasingly powerful packaging solutions based on fan-out technology.