At RTI’s 3D ASIP last week, I sat down with Paul Enquist, of Ziptronix, to get an update on the company’s progress with its direct bonding technologies.  Paul presented on Day 2 of the conference, but honored me with a one-on-one explanation on the application space enabled by the company’s two proprietary processes, Zibond and Direct Bond Interconnect (DBI).  Zibond is the direct oxide bond technology only, while DBI involves a cu-to-cu interconnect that can be achieved with or without through silicon via (TSV) technology.

Earlier this year, Ziptronix made headlines when it licensed Zibond to Sony for backside illumination (BSI) of CMOS image sensors (CIS), and Enquist was able to share that the resulting device has found its way into the iPhone.  BSI offers improved resolution for image sensors because illuminating pixels from the backside improves pixel performance. Sony first introduced CIS with BSI using adhesives that required higher temperature bonding.  However, Enquist explained, direct oxide bonding requires a lower temperature and improves pixel distortion. Ultimately, the low distortion capability of low temperature direct oxide bonding enables pixel scaling down to 1.4 and submicron for higher resolution, smaller die, and lower cost.  Lower temperature enables scalability, and allows for die shrinks in BSI.

What’s Next?
Now that the technology has been established in the supply chain for image sensors, the perceived risk has been greatly reduced, and allows the technology to be leveraged in other applications, noted Enquist.  “We anticipate signing more licenses in 2012 beyond image sensors,” he said, “We believe our technology will allow for increased integration in RF front end applications and baseband. We are also pursuing pico-projectors and 3D memory.”

While the current generation of BSI only uses the direct oxide bond (Zibond) process, Enquist anticipates that the next generation will incorporate DBI to bond a pixel layer onto a logic layer for reduced overall footprint of the CIS. This re-architectured  CIS will be a true 3D configuration. He predicts improved yields and a 30% cost savings due to smaller die, cheaper CMOS, and overall smaller footprints – all of which provide value-add to the customer.

While DBI is not yet in volume production, from a supply chain perspective it’s considered a copper damascene process, so the infrastructure is well established. He said the interconnect capability adds more to the picture. The low temperature process allows for materials with different coefficient of thermal expansion (CTE) to be bonded. It can be used to achieve monolithic 3D ICs, or for 3D packaging.  “Now that Zibond has been adopted, it’s just a short putt to get DBI to be adopted,” concluded Enquist.

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