This year’s 2010 IEEE International Interconnect Technology Conference (June 7-9, Burlingame, CA) has caught the 3D fever. So much so that organizers have added a session on alternative back-end memory technologies, specifically intending to investigate 3D memory technologies.
“The industry is actively pursuing research on monolithically stacked 3D memory approaches today. These approaches have multiple layers of back-end compatible memory cells and interconnects stacked on top of each other. IITC, which is a forum for interconnects and back-end integration, is looking to address this topic.” said Michael Armacost, IITC 2010 Publicity Chair and Managing Director at Applied Materials, Inc.
And that’s not all. A quick glance at the advanced agenda reveals a vast array of obviously 3D-related topics (3D in the title was the tipoff) such as:
3D Applications to Systems presented by Phil Emma, IBM;
A 3D Interconnect System for Large Biosensor Array and CMOS Signal-Processing IC Integration, submitted by a contingency from Georgia Tech (Shown above); A Study of Signal Integrity Issues in Through-Silicon-Via-based 3D ICs, also from Georgia Tech, and Integration and Frequency Dependent Electrical Modeling of Through Silicon Vias (TSV) for High Density 3DICs, co-authored by a team comprising ST Microelectronics, CEA Leti, Université de Savoie, IMEP-LAHC; in addition to those that are not so obviously titled, like A BEOL Multilevel Structure with Ultra Low-k Materials, representing the combined research of Global Foundries, IBM’s Watson Research and Albany Nanotech.
A Session titled 3D Packaging and TSV, Features research from TSMC, Renesas, Qualcomm, IMEC, University of Tokyo, and Fujitsu. Additionally, the second session, 3D and TSV II will feature presentations by 3D InCites partner companies EV Group and SUSS MicroTec, who, along with SEMATECH (EVG) and IMEC (SUSS) will each present their latest research on Cu-Cu thermocompressiuon bonding processes. EVG/SEMATECH’s work focuses on alignment and infrared metrology studies, while SUSS/IMEC’s research focuses on interconnect process using 3D-TSV and wafer-to-wafer thermo-compression bonding.
All in all, it’s a pretty intense program. Anyone interested in provided guest blog coverage to 3D InCites is more than welcome. Contact us if you’re interested.