FOPLP

IFTLE 403: TSMC 4th Generation CoWoS; 2018 Singapore EPTC Part 1

IFTLE 403: TSMC 4th Generation CoWoS; 2018 Singapore EPTC Part 1

Heterogeneous Integration spurs demand for 3D backend solutions Julian Ho reported in the Jan 10th issue of Digitimes that heterogeneous integration of diverse semiconductor components to support 5G, AI, automotive electronics, and IoT applications is gaining significant momentum, driving demand for system-in-package (SiP) and system-on-3D package (So3D) processes and boosting the importance of c... »

An Update on the Fan-out Panel-Level Packaging Consortium

An Update on the Fan-out Panel-Level Packaging Consortium

One topic that has been under hot debate in the semiconductor advanced packaging sector for the past few years is fan-out panel-level packaging (FOPLP).  In theory, the concept of taking fan-out from a 300-mm reconstituted wafer to a large panel format as a way to lower costs seems simple, and even the logical step. It’s not. Skeptics, many burned by the same low-cost advantage argument for inv... »

TechSearch International Analyzes Trends in FO-WLP including Panel Activity

TechSearch International Analyzes Trends in FO-WLP including Panel Activity

While Apple remains the main customer for TSMC’s Integrated Fan-Out WLP (InFO-WLP), an increasing number of companies are adopting a large area version of FO on Substrate. HiSilicon has been in production with ASE’s FOCoS for several years and MediaTek just announced a logic device for networking applications using TSMC’s InFO on Substrate (InFO_oS). TSMC’s FO-WLP platform has been extende... »

Citius, Altius, Fortius Redux: More From SEMICON Korea 2018

Citius, Altius, Fortius Redux: More From SEMICON Korea 2018

The Winter Games are over and the athletes returned home, and the SEMICON Korea 2018 teams from February have their sights on SEMICON China this month after all that snow-in-Seoul settled, but I still have a few more comments about the Electropackage System and Interconnect Product technical session SEMI organized for the afternoon of 01 February 2018, and on which I reported in my first installme... »

Panel Level Packaging: The Next Sleeping Giant? And Other Thoughts From IWLPC 2017

Panel Level Packaging: The Next Sleeping Giant? And Other Thoughts From IWLPC 2017

To the best of my recollection (and a quick search through 3D InCites’ archives) the panel level packaging (PLP) hoopla first hit the conference circuit in 2015 at the International Wafer Level Packaging Conference (IWLPC), when Jan Vardaman made it the topic of a panel discussion, and told a cautionary tale of following PLP down the rabbit hole. It seems that ever since, PLP has been an event h... »

FOPLP

Fifty Shades of Fan-out Discussed at ECTC 2017

The fan-out conversation that started at IMAPS DPC 2017 in March continued this week at the annual Electronics Components Technology Conference (ECTC), which took place in Orlando at the Walt Disney World Swan and Dolphin Resort. The buzz started during the Tuesday evening plenary session, where panelists Douglas Yu, TSMC, Tim Olson, Deca Technologies; Steffen Kroehnert, NANIUM; Rolf Aschenbrenner... »

The Advanced Packaging Times, they are A-Changing…or Are They?

The Advanced Packaging Times, they are A-Changing…or Are They?

It’s been a nearly a month since the 2017 IMAPS Device Packaging Conference and Global Business Council, so I’ve had plenty of time to mull over the many presentations and conversations focused on advanced packaging trends. The winds of change are blowing ever so slightly from year’s past. You had to listen carefully, and in some cases, read between the lines so not to miss them. I could rep... »

MEMS  Ascendant at IMAPS Device Packaging 2017

MEMS Ascendant at IMAPS Device Packaging 2017

Semiconductor device fabrication and packaging is rife with acronyms, and by my estimate, the Top 3 trafficked by speakers at the recent IMAPS Device Packaging Conference were the acronyms FOWLP, FOPLP, and MEMS. That would be fan-out wafer level packaging, fan-out panel level packaging, and microelectromechanical systems, respectively. It wasn’t that IMAPS was a MEMS packaging conference in the... »

Dev Gupta Disrupts the Fan-out Panel at IMAPS DPC, You Won’t Believe What Else Happened!

Dev Gupta Disrupts the Fan-out Panel at IMAPS DPC, You Won’t Believe What Else Happened!

Here we go again! One thing is for sure, there is never a dull moment at the IMAPS Device Packaging Conference panel sessions. (Remember the year of Alphabet Soup?) Maybe it’s because they take place AFTER everyone’s had a few drinks, but this year was especially lively and entertaining. There was humor, there was drama, AND there was a really good story being told at the fan-out panel discus... »

Discussing Panel Scale Packaging at SEMI’s Northeast Forum

Discussing Panel Scale Packaging at SEMI’s Northeast Forum

SEMI did a great job at SEMICON West 2016 organizing a bursting-at-the-seams amount of technical content presented on the show floor, content that included (pleasant surprise) a full track devoted to advanced packaging topics. Definitely not business as usual. The distinction between where fab processes end and where packaging processes begin is blending more and more, thanks to trends like More t... »

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