Cadence

Image Courtesy of TSMC Ltd.

TSMC’s OIP 2017 Symposium Shows The Awesome Power of an Ecosystem

Last week, September 13 to be exact, TSMC held its Open Innovation Forum (OIP 2017) Symposium at the Santa Clara Convention Center. Before getting into product and market details, allow me to share some of my general impression of this, as usual, very well-organized event. After several decades of experience with alliance management and ecosystem building, I see TSMC as the master of these discipl... »

Cadence Design Systems: Encounter Test

Cadence Design Systems: Encounter Test

Product Description Cadence Encounter Test provides a comprehensive methodology for 3D-IC design-for-test and automatic test pattern generation that includes a DfT architecture that controls and observes an individual die from the chip I/Os, different test modes to control application of tests up and down the stack, and interconnect tests to detect through-silicon via defects. Testimonial This pro... »

3D ICs News in Brief – Jan. 19-29

3D ICs News in Brief – Jan. 19-29

While there is still a lot to report about the European TSV Summit, I wanted to catch everyone up on some recent developments at companies that have come my way via press release; beginning with the most recent: STATS ChipPAC and UMC announced that they have demonstrated the world’s first TSV-enabled 3D IC chip stacking technology developed under an open ecosystem collaboration. The companies re... »

Just another 3D Monday

For me, Mondays are about regrouping, getting out of weekend head and into what’s going on in the 3D world. (I confess, I do leave my work at the office!) Mostly I cruise around looking to be inspired. Here’s what was waiting for me today. Symmetry is an online magazine I’ve never heard of before; probably because it’s about particle physics and how it relates to other aspects of life and »

Monday 3D Mash-up

For most of July I focused on coverage of SEMICON West in 3D.  Today, I thought I’d take a look at what else people were talking about in 3D space over the past few weeks. The Water Cooling IssueTwo bloggers took on the topic of water cooling 3D IC assemblies as a way to handle the heat. Brian Bailey got the ball rolling in his interview with Madhavan Swaminathan, who wears many hats in the 3D »

EDPS 3D Friday – The Vendor’s Turn

In addition to my Monday blog post, there has been a plethora of articles authored by other industry bloggers about the 3D Friday event, most of them focused on the user perspective, as well as the panel.  I haven’t seen a whole lot of attention paid to the vendors, Mentor, Cadence and Synopsys – all who had some input on their company’s offerings and readiness for 3D IC so far.  So I will »