Lessons Learned From the Trenches of 3D IC Manufacturing for Sensor Applications

Lessons Learned From the Trenches of 3D IC Manufacturing for Sensor Applications

The technologies are ready, the target high volume  applications for 3D IC manufacturing have been identified, and now it’s about convincing system architects there’s more to gain from designing in 2.5D and 3D ICs than there is to lose. At last week’s European 3D TSV Summit (January 21-22), two European manufacturers took to the podium to shared their reasons for implementing 2.5D and 3D integration, and how they are now realizing not just the functionality and performance benefits, but the cost savings 3D TSVs bring at the system level. System guys, take note.

In his keynote address, New Opportunities for 3D TSV Integration, Martin Henry, Silicon Technology Development Director Front-End Manufacturing and Technology R&D Embedded Processing Solutions, STMicroelectronics, talked about the company’s TSV pilot line, and how it is already in low volume production with 3D TSVs. They have been working closely with CEA Leti since 2007, and were the first to introduce 2.5D integration with its TSV wafer level camera, which went into production in 2008. He said the company has put modeling and characterization in place to support a true platform “We have everything we need to get TSV and 3D into volume production,” he said, adding that the infrastructure in Grenoble is in place for this.

Imaging, Si Photonics and advanced logic is what’s driving 3D applications at ST Microelectronics. “3D gives us the most competitive platform.” said Henry. He went on to point out that ST Micro’s backside illuminated image sensor (BSI CIS) contain many bricks used in 3D, and has been in volume production for some time.

Si Photonics in 3D IC Integration Henry talked about the advantages of 2.5D and 3D for electronic/photonic integration. ST Micro has this in place today using Cu µPillar technology and face-to-face bonding, which he says facilitates the use of independent electrical and optical ICs to maximize total system performance without compromise. “Tomorrow, we will add TSVs which will allow us to be more competitive.” He noted. Specifically, TSVs will facilitate a higher form factor with more logic on-board and the possibility of logic-to-logic communication through photonics.

At ams AG, 3D ICs with TSVs are seen as a key innovation for enabling miniaturized electronic systems, noted Franz Schrank, Manager 3D Integration, ams AG, in his presentation, Manufacturing of 3D Integrated Sensor ICs. The company’s core competency is sensor integration for automotive, medical and industrial applications, a market that they see increasing rapidly over the next few years. For ams, the performance, size and power/signal and cost benefits to be gained make 3D TSV integration a no-brainer for sensor integration.

“Typical sensor applications with wire bonding requires costly packaging that consumes larger areas,” he explained, adding that integrating TSVs and bumps on the backside of the sensor allows you to eliminate the bonding wire. It also allows stacking of the sensor on the IC, bringing the sensor closer to the circuitry and reducing parasitics.

Two examples of ams products that are based on TSV technology include a computer tomography (CT) scan sensor and a light sensor. In the CT sensor, TSVs allowed for the direct combination of the photo-detector and the ADC into a highly integrated detector module for a reduction in power, heat dissipation and space. The results were improved image resolution, lower radiation dose, and system power savings. In the light sensor, eliminating wire bonds in favor of TSVs resulted in the lowest package height and no need for glass. The filters are highly insensitive to humidity, and it is possible to put multiple optical filters on the same die.

3D IC Manufacturing - Open TSVsSchrank described ams’s modular TSV integration approach, which he says has been proven and qualified under automotive conditions. The sensor and TSV modules are bonded using wafer-to-wafer bonding. The TSV module is based on a via-last approach TSV that is open (unfilled), lined with tungtsen metallization followed by a passivation layer. The TSVs are low aspect ratio/ low density, and can be up to 250µm deep.

Clearly ams is using a very different approach and has very different requirements than is expected for HVM memory/logic applications we’re talking for about consumer applications, but it’s important to hear the success stories of companies who are already implementing 3D ICs, and understand the lessons learned so that we can efficiently implement 2.5D and 3D in the next target applications. ~ F.v.T.