Last week, as I have been doing for the last few years, I went to the D43D Workshop. This year, it was hosted by MINATEC in beautiful Grenoble, France. In spite of the severe weather forecast, we had three sunny days with deep blue skies; still snow on the top of the Belledonne, which is kind of unusual for the end of June.

The first day of the conference started with a great talk by Christian Val, CEO of 3D Plus, about 3D-IC technology that he and his company are doing for aerospace, automotive, and health applications; although not exactly mainstream – peripheral Through Polymer Via (TPV) instead of Through Silicon Via (TSV) laser-etched throughout the entire stack – it was indeed very interesting and, in my humble opinion, one of the few signs of real life in the 3D-IC field.

Later that day, TSMC’s Frank Lee described the current status of CoWoS, and the next steps. He noted how moving from today’s 10µm to smaller diameter TSV with a reasonable A/R will be challenging, in spite of claims that 2µm-diameter TSVs would be ready for primetime at other foundries; and that JEDEC Wide I/O memory standard, while extremely detailed under certain physical aspects such as TSV pitch, leaves a number of open questions, e.g. in the field of test.

Xilinx’s Brendan Farley described the progression of 2.5D-IC integration at his company, from homogeneous to heterogeneous, hinting that memory will be the next step; interestingly, I learned that image processing onboard NASA’s Curiosity Rover is made using Xilinx Virtex7.

The second day featured a keynote by ST-Ericsson Georg Kimmich, who illustrated how the roadblock towards 3D-IC integration is no longer technical but, rather, economical; the progression of silicon process technology and memory IP have postponed the transition from 2D- to 3D-IC everywhere but possibly at Xilinx. My two cents: like the weather forecast, 3D-IC forecasts have proven wrong and 3D-IC may continue to be a technology of the future even in the foreseeable future. Huge efforts have been made throughout the supply chain, but the jury is still out as far as the ROI is concerned.

The last day started with a keynote byUniversity of Bologna, Italy & ETHZ professor Luca Benini, who described the many, ongoing research projects he, his colleagues and students are working on in the field of 3D-IC. My friend and colleague, Synopsys’ Steve Smith, gave an interesting talk entitled “Help wanted? Help given!” noting how the 3D-IC eco-system is in place, ready for take-off, and how design EDA cannot be deemed responsible for the long taxi time.

Another old friend and former colleague, Monozukuri founder & CEO Anna Fontanelli, proposed a funny analogy between IC design and the never-ending chase of Wile E. Coyote vs. the Road Runner. She claimed that scarce I/O resources are the problem in the quest for terabandwidth, and that I/O planning and optimization will play a critical role moving forward. She also noted how horizontal connections on interposers are an order of magnitude more abundant/cheaper than TSV, thus making 2.5D-IC more interesting/attractive than 3D-IC for the next several years.

This was the 5th D43D workshop; the 6th will be held in Lausanne, Switzerland. I’m not sure about the 7th…

Samuel Beckett’s play “Waiting for Godot” tells the story of two men, Vladimir and Estragon, who spend their entire life waiting for Godot, who never shows up. At this year’s D43D, it seemed my fellow participants  and I felt like Vladimir and Estragon: the early days of enthusiasm were gone; the topics, and the references (Virtex7, WIOMING, etc.) were about the same. For how long can we wait for Godot? Perhaps, overtime, some of us, unlike Vladimir and Estragon, may decide that we have been waiting enough. ~ M.C.R

Marco Casale-Rossi

The Bio hasn't been uploaded yet

View Marco's posts

Become a Member

Media Kit