To enable high-volume production readiness of 3D-based products, SEMATECH’s 3D Interconnect and Manufacturability programs will be conducting Equipment Maturity Assessments (EMAs) of several critical 3D tools during 2012 to establish functional equipment capabilities and address high volume manufacturing maturity issues. The assessment is a cooperative effort among experts from SEMATECH’s 3D program, ISMI’s EMA team, and the supplier.
3D integration is introducing several new process steps primarily on the wafer backside and between chip makers fab processes and packaging. These include temporary bonding to handle wafers, wafer thinning, through-silicon via (TSV) reveal, re-distribution layers (RDL), wafer or die bonding, and wafer release. Compared to existing fab tools, these new processes and the accompanying tools are relatively immature and need a comprehensive understanding of tool performances to prepare for high volume manufacturing (HVM).
Based on its decade long experience with wafer size transition programs, ISMI has refined and extended its Equipment Maturity Assessment tool to provide a systematic, rigorous assessment of semiconductor equipment to determine test readiness as well as production or HVM readiness.
During the EMA process, experts from SEMATECH’s 3D IC program and ISMI’s EMA team will evaluate performance characteristics in several developing 3D equipment and provide performance management tool solutions that will detect manufacturability issues in advance of manufacturing insertion. Additionally, a broader HVM readiness assessment can be performed to extend an existing EMA test program.
“3D is a major industry transition. ISMI has successfully applied the EMA methodology to two major wafer size transitions,” said Sitaram Arkalgud, director of SEMATECH’s 3D Interconnect program. “SEMATECH’s 3D program members and supplier partners will benefit by applying this methodology to refine tools and accelerate the readiness of HVM introduction of 3D interconnects.”
“The EMA aims to ensure that enough information is collected to make a sound judgment about the amount of testing to which equipment should be subjected during demonstration testing,” said Sanjay Rajguru, director of ISMI. “Our EMA team will be working with SEMATECH’s technical programs to produce valuable characterization information on critical tools that IC makers and suppliers can use to detect manufacturability issues in early development phases.”
SEMATECH’s programs are pragmatic and value-driven, to help members develop processes and materials to reduce costs and maximize their return on investment. SEMATECH’s 3D Program delivers robust 300mm equipment and process technology solutions for high-volume TSV manufacturing. At the same time, ISMI works cooperatively with semiconductor manufacturers on developing innovative manufacturing capabilities to solve common productivity, cost and cycle time challenges in semiconductor factories and equipment.
To learn more about conducting EMAs for suppliers of wafer backside processing equipment, contact 3DInterconnect@sematech.org.
