Archives April 2010 - 3D InCites

The latest TSV scoop

Saturday night, around 10pm, PDT I’m sitting on the couch watching a movie with my daughter, when my cell phone rings. “Hello?” (I’m informal on the weekends) “Is this the Queen of 3D?” asks a voice on the other end. I’d noticed the phone number was from overseas – Taiwan, to be exact. »

Who Invented the Through Silicon Via (TSV) and When?

In this post written and submitted by John H. Lau, Electronics & Optoelectronics Laboratory, ITRI, the true inventor of the Through Silcon Via (TSV) is revealed. »

SEMATECH Technologists Detail Process Advances to Accelerate 3D Manufacturing Readiness

With a focus on providing cost-effective and reliable solutions to speed manufacturing readiness of 3D technology options, experts from SEMATECH’s 3D interconnect program based at the College of Nanoscale Science and Engineering’s (CNSE) Albany NanoTech Complex outlined new developments in wafer bonding, copper removal, and wafer thinning at the 2010 Materials Research Society (MRS) Spring Mee »

The eruption disruption

I’m taking a poll, how many of you had your business travel disrupted last week due to the volcano erupting in Iceland? »

STATS ChipPAC takes eWLB to 300mm; paves the way for 3D eWLB

Embedded wafer level ball grid array (eWLB) technology has been a hot topic lately on 3D InCites, what with our recent discussion with ST Micro’s Xavier Baraton, and this week’s »

STATS ChipPAC implements 300mm manufacturing for eWLB technology

Semiconductor test and advanced packaging service provider (SATS) STATS ChipPAC announced it has has expanded embedded Wafer-Level Ball Grid Array (eWLB) technology -- jointly developed by STATS ChipPAC, Infineon, and ST Microelectronics -- to reconstituted 3 »

Gearing up for IITC in 3D

This year’s 2010 IEEE International Interconnect Technology Conference (June 7-9, Burlingame, CA) has caught the 3D fever. »

DATE’10 3D Integration Workshop addresses applications, technology, architecture, design, automation, and test’

3D Workshop organizers Erik Jan Marinissen (IMEC), Yann Guillou (ST-Ericsson) Geert Van der Plas (IMEC) report back from a very successful second year at DATE, 2010 in Dresden, Germany. »

Alchimer signs far-reaching agreement with KPM Tech

In a deal that is expected to generate economical new process options for the 3D integration market, Alchimer S.A., a provider of nanometric deposition technology for semiconductor interconnects and through-silicon vias (TSVs), and KPM Tech Co. »